From patchwork Fri Jun 5 00:28:18 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 480980 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id A09AD14027F for ; Fri, 5 Jun 2015 10:29:18 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=YwmfjGrp; dkim-atps=neutral Received: from localhost ([::1]:44767 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0fVc-000869-R7 for incoming@patchwork.ozlabs.org; Thu, 04 Jun 2015 20:29:16 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43322) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0fVK-0007pZ-Th for qemu-devel@nongnu.org; Thu, 04 Jun 2015 20:28:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z0fVG-0001P4-JW for qemu-devel@nongnu.org; Thu, 04 Jun 2015 20:28:58 -0400 Received: from mail-pa0-x22f.google.com ([2607:f8b0:400e:c03::22f]:34048) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0fVG-0001Om-C9 for qemu-devel@nongnu.org; Thu, 04 Jun 2015 20:28:54 -0400 Received: by payr10 with SMTP id r10so39412523pay.1 for ; Thu, 04 Jun 2015 17:28:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=quSKKPvmFgSFxXe2DVQJCl5kY7QAkKu106+MQHSEQl8=; b=YwmfjGrpT8wxCEBGv7OdVPieuPbJDR0qveIaraQtnFxnwoFZVwsZN7+9RC/f2rQbTU tDk7AgwmfxsifAqG3lHjw49IUO39N9V592VL56Jqp/Knhub227e5bpT7rTNusvNioORT 2JJndIfeTCHPWeV2bJNjFkbzfOBEUw7t8+tEKSGGnr9/FtTWYEgBTLU+FnmUQLJJ1cZW HZ9hndA73Xbe1NboCBTjK5/XWmYdCL+tyPJW9Gdc595rh+ZtiHFgCDF0+LuiqrAgpkBA OC62l0o6L+gOLOrbyV8Nk5tt2ubAAxLa7LcYDo2DPe5fgru9dsbaVqWgBGAeuMdTND+i oN9w== X-Received: by 10.66.153.173 with SMTP id vh13mr1137719pab.130.1433464133427; Thu, 04 Jun 2015 17:28:53 -0700 (PDT) Received: from localhost ([203.126.243.116]) by mx.google.com with ESMTPSA id fk4sm4805405pbb.80.2015.06.04.17.28.52 (version=TLSv1.1 cipher=RC4-SHA bits=128/128); Thu, 04 Jun 2015 17:28:52 -0700 (PDT) From: Alistair Francis To: qemu-devel@nongnu.org, edgar.iglesias@xilinx.com Date: Fri, 5 Jun 2015 10:28:18 +1000 Message-Id: <5285192d66fa860c966002c78d38384fdba095c3.1433314301.git.alistair.francis@xilinx.com> X-Mailer: git-send-email 2.1.1 In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c03::22f Cc: peter.crosthwaite@xilinx.com, alistair.francis@xilinx.com Subject: [Qemu-devel] [PATCH RESEND v1 2/8] target-microblaze: Convert dcache-writeback to a CPU property X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Originally the dcache-writeback PVR bits were manually set for each machine. This is a hassle and difficult to read, instead set them based on the CPU properties. Signed-off-by: Alistair Francis --- hw/microblaze/petalogix_ml605_mmu.c | 3 ++- target-microblaze/cpu-qom.h | 1 + target-microblaze/cpu.c | 5 +++++ 3 files changed, 8 insertions(+), 1 deletions(-) diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c index 05c120a..995a579 100644 --- a/hw/microblaze/petalogix_ml605_mmu.c +++ b/hw/microblaze/petalogix_ml605_mmu.c @@ -70,7 +70,6 @@ static void machine_cpu_reset(MicroBlazeCPU *cpu) env->pvr.regs[10] = 0x0e000000; /* virtex 6 */ /* setup pvr to match kernel setting */ - env->pvr.regs[5] |= PVR5_DCACHE_WRITEBACK_MASK; env->pvr.regs[0] |= PVR0_ENDI; env->pvr.regs[0] = (env->pvr.regs[0] & ~PVR0_VERSION_MASK) | (0x14 << 8); env->pvr.regs[4] = 0xc56b8000; @@ -98,6 +97,8 @@ petalogix_ml605_init(MachineState *machine) * root instructions */ object_property_set_int(OBJECT(cpu), 1, "use-fpu", &error_abort); + object_property_set_bool(OBJECT(cpu), true, "dcache-writeback", + &error_abort); object_property_set_bool(OBJECT(cpu), true, "realized", &error_abort); /* Attach emulated BRAM through the LMB. */ diff --git a/target-microblaze/cpu-qom.h b/target-microblaze/cpu-qom.h index dd37a5c..af6739f 100644 --- a/target-microblaze/cpu-qom.h +++ b/target-microblaze/cpu-qom.h @@ -65,6 +65,7 @@ typedef struct MicroBlazeCPU { uint32_t base_vectors; uint8_t usefpu; bool usemmu; + bool dcache_writeback; } cfg; CPUMBState env; diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c index 37dc0fb..2a1ff64 100644 --- a/target-microblaze/cpu.c +++ b/target-microblaze/cpu.c @@ -119,6 +119,9 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp) env->pvr.regs[2] |= (cpu->cfg.usefpu ? PVR2_USE_FPU_MASK : 0) | (cpu->cfg.usefpu > 1 ? PVR2_USE_FPU2_MASK : 0); + env->pvr.regs[5] |= cpu->cfg.dcache_writeback ? + PVR5_DCACHE_WRITEBACK_MASK : 0; + env->pvr.regs[10] = 0x0c000000; /* Default to spartan 3a dsp family. */ env->pvr.regs[11] = PVR11_USE_MMU | (16 << 17); @@ -169,6 +172,8 @@ static Property mb_properties[] = { */ DEFINE_PROP_UINT8("use-fpu", MicroBlazeCPU, cfg.usefpu, 2), DEFINE_PROP_BOOL("use-mmu", MicroBlazeCPU, cfg.usemmu, true), + DEFINE_PROP_BOOL("dcache-writeback", MicroBlazeCPU, cfg.dcache_writeback, + false), DEFINE_PROP_END_OF_LIST(), };