@@ -115,6 +115,9 @@ typedef struct Tegra2State {
TegraClocksState clocks;
SDHCIState sdhci[4];
TegraI2CState i2c[4];
+#if 0
+ EHCISysBusState usb[3];
+#endif
} Tegra2State;
#endif /* softmmu */
@@ -272,6 +272,36 @@ static void tegra2_initfn(Object *obj)
sysbusdev = SYS_BUS_DEVICE(dev);
sysbus_mmio_map(sysbusdev, 0, 0x7000d000);
sysbus_connect_irq(sysbusdev, 0, s->irq[53]);
+
+ /* USB EHCI host controllers */
+#if 0
+ object_initialize(&s->usb[0], TYPE_TEGRA2_EHCI);
+ dev = DEVICE(&s->usb[0]);
+ qdev_set_parent_bus(dev, sysbus_get_default());
+ object_property_add_child(obj, "usb[0]", (Object *) dev, NULL);
+ qdev_init_nofail(dev);
+ sysbusdev = SYS_BUS_DEVICE(dev);
+ sysbus_mmio_map(sysbusdev, 0, 0xc5000000);
+ sysbus_connect_irq(sysbusdev, 0, s->irq[20]);
+
+ object_initialize(&s->usb[1], TYPE_TEGRA2_EHCI);
+ dev = DEVICE(&s->usb[1]);
+ qdev_set_parent_bus(dev, sysbus_get_default());
+ object_property_add_child(obj, "usb[1]", (Object *) dev, NULL);
+ qdev_init_nofail(dev);
+ sysbusdev = SYS_BUS_DEVICE(dev);
+ sysbus_mmio_map(sysbusdev, 0, 0xc5004000);
+ sysbus_connect_irq(sysbusdev, 0, s->irq[21]);
+
+ object_initialize(&s->usb[2], TYPE_TEGRA2_EHCI);
+ dev = DEVICE(&s->usb[2]);
+ qdev_set_parent_bus(dev, sysbus_get_default());
+ object_property_add_child(obj, "usb[2]", (Object *) dev, NULL);
+ qdev_init_nofail(dev);
+ sysbusdev = SYS_BUS_DEVICE(dev);
+ sysbus_mmio_map(sysbusdev, 0, 0xc5005000);
+ sysbus_connect_irq(sysbusdev, 0, s->irq[97]);
+#endif
}
static const TypeInfo tegra2_type_info = {