From patchwork Thu Aug 11 23:18:59 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 109714 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 8CA08B6F72 for ; Fri, 12 Aug 2011 09:19:21 +1000 (EST) Received: from localhost ([::1]:45390 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QreWx-00031U-H6 for incoming@patchwork.ozlabs.org; Thu, 11 Aug 2011 19:19:15 -0400 Received: from eggs.gnu.org ([140.186.70.92]:50903) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QreWo-0002vB-Nw for qemu-devel@nongnu.org; Thu, 11 Aug 2011 19:19:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QreWk-0006WO-6Y for qemu-devel@nongnu.org; Thu, 11 Aug 2011 19:19:06 -0400 Received: from mail-qw0-f45.google.com ([209.85.216.45]:38856) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QreWk-0006Vu-3Q for qemu-devel@nongnu.org; Thu, 11 Aug 2011 19:19:02 -0400 Received: by qwj8 with SMTP id 8so1597959qwj.4 for ; Thu, 11 Aug 2011 16:19:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=sender:message-id:date:from:user-agent:mime-version:to:cc:subject :references:in-reply-to:content-type:content-transfer-encoding; bh=BbLCPdC/ZRMSWHPw7KR3MElPx+8pY9ifDFXbZ2eIc0M=; b=upjMiEdygPwwpVADiOLgK7v9qYp7GmovpZU52zm/tzujCBvIjGTReSBTJtw4hNQq/j 35CNSGmrt0cIV4FUWkhFEf3vsEo8ZEovYrNIsp+A0oVFk0lHogmNaQFiicPUMHQCU4GI JEANQipBUBDFP6xxO/X0jQIGQBdbQ/G50n5Iw= Received: by 10.229.20.146 with SMTP id f18mr134968qcb.285.1313104741370; Thu, 11 Aug 2011 16:19:01 -0700 (PDT) Received: from anchor.twiddle.net (c-71-227-161-214.hsd1.wa.comcast.net [71.227.161.214]) by mx.google.com with ESMTPS id r3sm1905331qct.27.2011.08.11.16.19.00 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 11 Aug 2011 16:19:00 -0700 (PDT) Message-ID: <4E446363.1020007@twiddle.net> Date: Thu, 11 Aug 2011 16:18:59 -0700 From: Richard Henderson User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:5.0) Gecko/20110707 Thunderbird/5.0 MIME-Version: 1.0 To: qemu-devel@nongnu.org References: <1313104041-1641-1-git-send-email-rth@twiddle.net> <1313104041-1641-2-git-send-email-rth@twiddle.net> In-Reply-To: <1313104041-1641-2-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 209.85.216.45 Cc: avi@redhat.com Subject: Re: [Qemu-devel] [PATCH 1/9] serial: Convert serial_mm_init to MemoryRegion. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From 04288b36c9fae976e976c455e9f26ff2d7d9ada7 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Thu, 11 Aug 2011 11:39:50 -0700 Subject: [PATCH 1/9] serial: Convert serial_mm_init to MemoryRegion. Signed-off-by: Richard Henderson --- hw/serial.c | 145 +++++++++++++---------------------------------------------- 1 files changed, 31 insertions(+), 114 deletions(-) Dang it. v1.1: Fix cut-and-paste error in DEVICE_LITTLE_ENDIAN copy of serial_mm_ops. diff --git a/hw/serial.c b/hw/serial.c index 466de21..f023357 100644 --- a/hw/serial.c +++ b/hw/serial.c @@ -28,6 +28,7 @@ #include "pc.h" #include "qemu-timer.h" #include "sysemu.h" +#include "exec-memory.h" //#define DEBUG_SERIAL @@ -153,11 +154,11 @@ struct SerialState { int poll_msl; struct QEMUTimer *modem_status_poll; + MemoryRegion io; }; typedef struct ISASerialState { ISADevice dev; - MemoryRegion io; uint32_t index; uint32_t iobase; uint32_t isairq; @@ -786,8 +787,8 @@ static int serial_isa_initfn(ISADevice *dev) serial_init_core(s); qdev_set_legacy_instance_id(&dev->qdev, isa->iobase, 3); - memory_region_init_io(&isa->io, &serial_io_ops, s, "serial", 8); - isa_register_ioport(dev, &isa->io, isa->iobase); + memory_region_init_io(&s->io, &serial_io_ops, s, "serial", 8); + isa_register_ioport(dev, &s->io, isa->iobase); return 0; } @@ -821,115 +822,37 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase, } /* Memory mapped interface */ -static uint32_t serial_mm_readb(void *opaque, target_phys_addr_t addr) -{ - SerialState *s = opaque; - - return serial_ioport_read(s, addr >> s->it_shift) & 0xFF; -} - -static void serial_mm_writeb(void *opaque, target_phys_addr_t addr, - uint32_t value) -{ - SerialState *s = opaque; - - serial_ioport_write(s, addr >> s->it_shift, value & 0xFF); -} - -static uint32_t serial_mm_readw_be(void *opaque, target_phys_addr_t addr) -{ - SerialState *s = opaque; - uint32_t val; - - val = serial_ioport_read(s, addr >> s->it_shift) & 0xFFFF; - val = bswap16(val); - return val; -} - -static uint32_t serial_mm_readw_le(void *opaque, target_phys_addr_t addr) -{ - SerialState *s = opaque; - uint32_t val; - - val = serial_ioport_read(s, addr >> s->it_shift) & 0xFFFF; - return val; -} - -static void serial_mm_writew_be(void *opaque, target_phys_addr_t addr, - uint32_t value) -{ - SerialState *s = opaque; - - value = bswap16(value); - serial_ioport_write(s, addr >> s->it_shift, value & 0xFFFF); -} - -static void serial_mm_writew_le(void *opaque, target_phys_addr_t addr, - uint32_t value) -{ - SerialState *s = opaque; - - serial_ioport_write(s, addr >> s->it_shift, value & 0xFFFF); -} - -static uint32_t serial_mm_readl_be(void *opaque, target_phys_addr_t addr) -{ - SerialState *s = opaque; - uint32_t val; - - val = serial_ioport_read(s, addr >> s->it_shift); - val = bswap32(val); - return val; -} - -static uint32_t serial_mm_readl_le(void *opaque, target_phys_addr_t addr) -{ - SerialState *s = opaque; - uint32_t val; - - val = serial_ioport_read(s, addr >> s->it_shift); - return val; -} - -static void serial_mm_writel_be(void *opaque, target_phys_addr_t addr, - uint32_t value) +static uint64_t serial_mm_read(void *opaque, target_phys_addr_t addr, + unsigned size) { SerialState *s = opaque; - - value = bswap32(value); - serial_ioport_write(s, addr >> s->it_shift, value); + return serial_ioport_read(s, addr >> s->it_shift); } -static void serial_mm_writel_le(void *opaque, target_phys_addr_t addr, - uint32_t value) +static void serial_mm_write(void *opaque, target_phys_addr_t addr, + uint64_t value, unsigned size) { SerialState *s = opaque; - + value &= ~0u >> (32 - (size * 8)); serial_ioport_write(s, addr >> s->it_shift, value); } -static CPUReadMemoryFunc * const serial_mm_read_be[] = { - &serial_mm_readb, - &serial_mm_readw_be, - &serial_mm_readl_be, -}; - -static CPUWriteMemoryFunc * const serial_mm_write_be[] = { - &serial_mm_writeb, - &serial_mm_writew_be, - &serial_mm_writel_be, -}; - -static CPUReadMemoryFunc * const serial_mm_read_le[] = { - &serial_mm_readb, - &serial_mm_readw_le, - &serial_mm_readl_le, -}; - -static CPUWriteMemoryFunc * const serial_mm_write_le[] = { - &serial_mm_writeb, - &serial_mm_writew_le, - &serial_mm_writel_le, +static const MemoryRegionOps serial_mm_ops[3] = { + [DEVICE_NATIVE_ENDIAN] = { + .read = serial_mm_read, + .write = serial_mm_write, + .endianness = DEVICE_NATIVE_ENDIAN, + }, + [DEVICE_LITTLE_ENDIAN] = { + .read = serial_mm_read, + .write = serial_mm_write, + .endianness = DEVICE_LITTLE_ENDIAN, + }, + [DEVICE_BIG_ENDIAN] = { + .read = serial_mm_read, + .write = serial_mm_write, + .endianness = DEVICE_BIG_ENDIAN, + }, }; SerialState *serial_mm_init (target_phys_addr_t base, int it_shift, @@ -938,7 +861,7 @@ SerialState *serial_mm_init (target_phys_addr_t base, int it_shift, int be) { SerialState *s; - int s_io_memory; + enum device_endian end; s = qemu_mallocz(sizeof(SerialState)); @@ -950,17 +873,11 @@ SerialState *serial_mm_init (target_phys_addr_t base, int it_shift, serial_init_core(s); vmstate_register(NULL, base, &vmstate_serial, s); + end = (be ? DEVICE_BIG_ENDIAN : DEVICE_LITTLE_ENDIAN); + memory_region_init_io(&s->io, &serial_mm_ops[end], s, + "serial", 8 << it_shift); if (ioregister) { - if (be) { - s_io_memory = cpu_register_io_memory(serial_mm_read_be, - serial_mm_write_be, s, - DEVICE_NATIVE_ENDIAN); - } else { - s_io_memory = cpu_register_io_memory(serial_mm_read_le, - serial_mm_write_le, s, - DEVICE_NATIVE_ENDIAN); - } - cpu_register_physical_memory(base, 8 << it_shift, s_io_memory); + memory_region_add_subregion(get_system_memory(), base, &s->io); } serial_update_msl(s); return s;