From patchwork Wed Dec 12 13:14:33 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Michael S. Tsirkin" X-Patchwork-Id: 205513 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 19CBC2C0097 for ; Thu, 13 Dec 2012 00:35:33 +1100 (EST) Received: from localhost ([::1]:37609 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Tim6O-000260-5y for incoming@patchwork.ozlabs.org; Wed, 12 Dec 2012 08:11:56 -0500 Received: from eggs.gnu.org ([208.118.235.92]:52733) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Tim65-0001U7-9W for qemu-devel@nongnu.org; Wed, 12 Dec 2012 08:11:47 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Tim5r-0002jh-5z for qemu-devel@nongnu.org; Wed, 12 Dec 2012 08:11:35 -0500 Received: from mx1.redhat.com ([209.132.183.28]:62241) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Tim5q-0002ja-SZ for qemu-devel@nongnu.org; Wed, 12 Dec 2012 08:11:23 -0500 Received: from int-mx01.intmail.prod.int.phx2.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id qBCDBMfB023076 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Wed, 12 Dec 2012 08:11:22 -0500 Received: from redhat.com (vpn1-7-32.ams2.redhat.com [10.36.7.32]) by int-mx01.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with SMTP id qBCDBKKd032268 for ; Wed, 12 Dec 2012 08:11:21 -0500 Date: Wed, 12 Dec 2012 15:14:33 +0200 From: "Michael S. Tsirkin" To: qemu-devel@nongnu.org Message-ID: <367f8bd9fe19261b9e79ba8b71d221daa788b904.1355318011.git.mst@redhat.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Mutt-Fcc: =sent X-Scanned-By: MIMEDefang 2.67 on 10.5.11.11 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 7/8] pci: rename pci_internals.h pci_bus.h X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org There are lots of external users of pci_internals.h, apparently making it an internal interface only didn't work out. Let's stop pretending it's an internal header. Signed-off-by: Michael S. Tsirkin --- hw/apb_pci.c | 2 +- hw/dec_pci.c | 2 +- hw/ich9.h | 2 +- hw/lpc_ich9.c | 2 +- hw/pci/pci.c | 2 +- hw/pci/pci_bridge.c | 2 +- hw/pci/pci_bus.h | 78 ++++++++++++++++++++++++++++++++++++++++++++++++++ hw/pci/pci_internals.h | 78 -------------------------------------------------- hw/pci/pcie.c | 2 +- hw/pci/pcie_aer.c | 2 +- hw/pci/pcie_port.h | 2 +- hw/pci/shpc.c | 2 +- hw/pci_bridge_dev.c | 2 +- hw/spapr_pci.c | 2 +- 14 files changed, 90 insertions(+), 90 deletions(-) create mode 100644 hw/pci/pci_bus.h delete mode 100644 hw/pci/pci_internals.h diff --git a/hw/apb_pci.c b/hw/apb_pci.c index de594f8..fb7a07d 100644 --- a/hw/apb_pci.c +++ b/hw/apb_pci.c @@ -30,7 +30,7 @@ #include "pci/pci.h" #include "pci/pci_host.h" #include "pci/pci_bridge.h" -#include "pci/pci_internals.h" +#include "pci/pci_bus.h" #include "apb_pci.h" #include "sysemu.h" #include "exec-memory.h" diff --git a/hw/dec_pci.c b/hw/dec_pci.c index a6a7c84..ee3f4ca 100644 --- a/hw/dec_pci.c +++ b/hw/dec_pci.c @@ -28,7 +28,7 @@ #include "pci/pci.h" #include "pci/pci_host.h" #include "pci/pci_bridge.h" -#include "pci/pci_internals.h" +#include "pci/pci_bus.h" /* debug DEC */ //#define DEBUG_DEC diff --git a/hw/ich9.h b/hw/ich9.h index 247be94..4e7442c 100644 --- a/hw/ich9.h +++ b/hw/ich9.h @@ -14,7 +14,7 @@ #include "acpi.h" #include "acpi_ich9.h" #include "pam.h" -#include "pci/pci_internals.h" +#include "pci/pci_bus.h" void ich9_lpc_set_irq(void *opaque, int irq_num, int level); int ich9_lpc_map_irq(PCIDevice *pci_dev, int intx); diff --git a/hw/lpc_ich9.c b/hw/lpc_ich9.c index 23dee88..7bca061 100644 --- a/hw/lpc_ich9.c +++ b/hw/lpc_ich9.c @@ -42,7 +42,7 @@ #include "acpi.h" #include "acpi_ich9.h" #include "pam.h" -#include "pci/pci_internals.h" +#include "pci/pci_bus.h" #include "exec-memory.h" static int ich9_lpc_sci_irq(ICH9LPCState *lpc); diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 6023ded..c1a4b32 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -24,7 +24,7 @@ #include #include "pci.h" #include "pci_bridge.h" -#include "pci_internals.h" +#include "pci_bus.h" #include #include #include diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c index 4680501..0fb7577 100644 --- a/hw/pci/pci_bridge.c +++ b/hw/pci/pci_bridge.c @@ -30,7 +30,7 @@ */ #include "pci_bridge.h" -#include "pci_internals.h" +#include "pci_bus.h" #include "range.h" /* PCI bridge subsystem vendor ID helper functions */ diff --git a/hw/pci/pci_bus.h b/hw/pci/pci_bus.h new file mode 100644 index 0000000..21d0ce6 --- /dev/null +++ b/hw/pci/pci_bus.h @@ -0,0 +1,78 @@ +#ifndef QEMU_PCI_INTERNALS_H +#define QEMU_PCI_INTERNALS_H + +/* + * This header files is private to pci.c and pci_bridge.c + * So following structures are opaque to others and shouldn't be + * accessed. + * + * For pci-to-pci bridge needs to include this header file to embed + * PCIBridge in its structure or to get sizeof(PCIBridge), + * However, they shouldn't access those following members directly. + * Use accessor function in pci.h, pci_bridge.h + */ + +#define TYPE_PCI_BUS "PCI" +#define PCI_BUS(obj) OBJECT_CHECK(PCIBus, (obj), TYPE_PCI_BUS) + +struct PCIBus { + BusState qbus; + PCIDMAContextFunc dma_context_fn; + void *dma_context_opaque; + uint8_t devfn_min; + pci_set_irq_fn set_irq; + pci_map_irq_fn map_irq; + pci_route_irq_fn route_intx_to_irq; + pci_hotplug_fn hotplug; + DeviceState *hotplug_qdev; + void *irq_opaque; + PCIDevice *devices[PCI_SLOT_MAX * PCI_FUNC_MAX]; + PCIDevice *parent_dev; + MemoryRegion *address_space_mem; + MemoryRegion *address_space_io; + + QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */ + QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */ + + /* The bus IRQ state is the logical OR of the connected devices. + Keep a count of the number of devices with raised IRQs. */ + int nirq; + int *irq_count; +}; + +typedef struct PCIBridgeWindows PCIBridgeWindows; + +/* + * Aliases for each of the address space windows that the bridge + * can forward. Mapped into the bridge's parent's address space, + * as subregions. + */ +struct PCIBridgeWindows { + MemoryRegion alias_pref_mem; + MemoryRegion alias_mem; + MemoryRegion alias_io; +}; + +struct PCIBridge { + PCIDevice dev; + + /* private member */ + PCIBus sec_bus; + /* + * Memory regions for the bridge's address spaces. These regions are not + * directly added to system_memory/system_io or its descendants. + * Bridge's secondary bus points to these, so that devices + * under the bridge see these regions as its address spaces. + * The regions are as large as the entire address space - + * they don't take into account any windows. + */ + MemoryRegion address_space_mem; + MemoryRegion address_space_io; + + PCIBridgeWindows *windows; + + pci_map_irq_fn map_irq; + const char *bus_name; +}; + +#endif /* QEMU_PCI_INTERNALS_H */ diff --git a/hw/pci/pci_internals.h b/hw/pci/pci_internals.h deleted file mode 100644 index 21d0ce6..0000000 --- a/hw/pci/pci_internals.h +++ /dev/null @@ -1,78 +0,0 @@ -#ifndef QEMU_PCI_INTERNALS_H -#define QEMU_PCI_INTERNALS_H - -/* - * This header files is private to pci.c and pci_bridge.c - * So following structures are opaque to others and shouldn't be - * accessed. - * - * For pci-to-pci bridge needs to include this header file to embed - * PCIBridge in its structure or to get sizeof(PCIBridge), - * However, they shouldn't access those following members directly. - * Use accessor function in pci.h, pci_bridge.h - */ - -#define TYPE_PCI_BUS "PCI" -#define PCI_BUS(obj) OBJECT_CHECK(PCIBus, (obj), TYPE_PCI_BUS) - -struct PCIBus { - BusState qbus; - PCIDMAContextFunc dma_context_fn; - void *dma_context_opaque; - uint8_t devfn_min; - pci_set_irq_fn set_irq; - pci_map_irq_fn map_irq; - pci_route_irq_fn route_intx_to_irq; - pci_hotplug_fn hotplug; - DeviceState *hotplug_qdev; - void *irq_opaque; - PCIDevice *devices[PCI_SLOT_MAX * PCI_FUNC_MAX]; - PCIDevice *parent_dev; - MemoryRegion *address_space_mem; - MemoryRegion *address_space_io; - - QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */ - QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */ - - /* The bus IRQ state is the logical OR of the connected devices. - Keep a count of the number of devices with raised IRQs. */ - int nirq; - int *irq_count; -}; - -typedef struct PCIBridgeWindows PCIBridgeWindows; - -/* - * Aliases for each of the address space windows that the bridge - * can forward. Mapped into the bridge's parent's address space, - * as subregions. - */ -struct PCIBridgeWindows { - MemoryRegion alias_pref_mem; - MemoryRegion alias_mem; - MemoryRegion alias_io; -}; - -struct PCIBridge { - PCIDevice dev; - - /* private member */ - PCIBus sec_bus; - /* - * Memory regions for the bridge's address spaces. These regions are not - * directly added to system_memory/system_io or its descendants. - * Bridge's secondary bus points to these, so that devices - * under the bridge see these regions as its address spaces. - * The regions are as large as the entire address space - - * they don't take into account any windows. - */ - MemoryRegion address_space_mem; - MemoryRegion address_space_io; - - PCIBridgeWindows *windows; - - pci_map_irq_fn map_irq; - const char *bus_name; -}; - -#endif /* QEMU_PCI_INTERNALS_H */ diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c index 7c92f19..d9c38b5 100644 --- a/hw/pci/pcie.c +++ b/hw/pci/pcie.c @@ -23,7 +23,7 @@ #include "pcie.h" #include "msix.h" #include "msi.h" -#include "pci_internals.h" +#include "pci_bus.h" #include "pcie_regs.h" #include "range.h" diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c index b04c164..3c3185c 100644 --- a/hw/pci/pcie_aer.c +++ b/hw/pci/pcie_aer.c @@ -25,7 +25,7 @@ #include "pcie.h" #include "msix.h" #include "msi.h" -#include "pci_internals.h" +#include "pci_bus.h" #include "pcie_regs.h" //#define DEBUG_PCIE diff --git a/hw/pci/pcie_port.h b/hw/pci/pcie_port.h index 3709583..36b2241 100644 --- a/hw/pci/pcie_port.h +++ b/hw/pci/pcie_port.h @@ -22,7 +22,7 @@ #define QEMU_PCIE_PORT_H #include "pci_bridge.h" -#include "pci_internals.h" +#include "pci_bus.h" struct PCIEPort { PCIBridge br; diff --git a/hw/pci/shpc.c b/hw/pci/shpc.c index 4597bbd..9297af0 100644 --- a/hw/pci/shpc.c +++ b/hw/pci/shpc.c @@ -4,7 +4,7 @@ #include "range.h" #include "shpc.h" #include "pci.h" -#include "pci_internals.h" +#include "pci_bus.h" #include "msi.h" /* TODO: model power only and disabled slot states. */ diff --git a/hw/pci_bridge_dev.c b/hw/pci_bridge_dev.c index 5c9fc50..dbb4b3b 100644 --- a/hw/pci_bridge_dev.c +++ b/hw/pci_bridge_dev.c @@ -25,7 +25,7 @@ #include "pci/shpc.h" #include "pci/slotid_cap.h" #include "memory.h" -#include "pci/pci_internals.h" +#include "pci/pci_bus.h" #define REDHAT_PCI_VENDOR_ID 0x1b36 #define PCI_BRIDGE_DEV_VENDOR_ID REDHAT_PCI_VENDOR_ID diff --git a/hw/spapr_pci.c b/hw/spapr_pci.c index e123866..6b05e5b 100644 --- a/hw/spapr_pci.c +++ b/hw/spapr_pci.c @@ -33,7 +33,7 @@ #include #include "trace.h" -#include "hw/pci/pci_internals.h" +#include "hw/pci/pci_bus.h" /* Copied from the kernel arch/powerpc/platforms/pseries/msi.c */ #define RTAS_QUERY_FN 0