From patchwork Thu Oct 28 06:54:35 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Isaku Yamahata X-Patchwork-Id: 69439 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 40CFFB6F07 for ; Thu, 28 Oct 2010 18:12:35 +1100 (EST) Received: from localhost ([127.0.0.1]:52305 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PBMf2-0008Vn-5w for incoming@patchwork.ozlabs.org; Thu, 28 Oct 2010 03:12:32 -0400 Received: from [140.186.70.92] (port=39788 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PBMV8-0004cF-SX for qemu-devel@nongnu.org; Thu, 28 Oct 2010 03:02:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PBMNk-0003Ew-F7 for qemu-devel@nongnu.org; Thu, 28 Oct 2010 02:54:46 -0400 Received: from mail.valinux.co.jp ([210.128.90.3]:54277) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PBMNj-0003EL-Ri for qemu-devel@nongnu.org; Thu, 28 Oct 2010 02:54:40 -0400 Received: from ps.local.valinux.co.jp (vagw.valinux.co.jp [210.128.90.14]) by mail.valinux.co.jp (Postfix) with SMTP id B0A25188C1; Thu, 28 Oct 2010 15:54:36 +0900 (JST) Received: (nullmailer pid 7815 invoked by uid 1000); Thu, 28 Oct 2010 06:54:36 -0000 From: Isaku Yamahata To: seabios@seabios.org Date: Thu, 28 Oct 2010 15:54:35 +0900 Message-Id: <32524df04b9ecb692eaf146d105e5dedfd8d7028.1288248755.git.yamahata@valinux.co.jp> X-Mailer: git-send-email 1.7.1.1 In-Reply-To: References: In-Reply-To: References: X-Virus-Scanned: clamav-milter 0.95.2 at va-mail.local.valinux.co.jp X-Virus-Status: Clean X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) Cc: yamahata@valinux.co.jp, cam@cs.ualberta.ca, adnan@khaleel.us, qemu-devel@nongnu.org, mst@redhat.com Subject: [Qemu-devel] [PATCH v3 1/2] pci: introduce pci_region to manage pci io/memory/prefmemory regions. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This patch adds helper functions to manage pci area. Signed-off-by: Isaku Yamahata --- Changes v2 -> v3 - [first, last] instead of [start, end) Changes v1 -> v2 - add comments --- Makefile | 3 +- src/pci_region.c | 77 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ src/util.h | 29 ++++++++++++++++++++ 3 files changed, 108 insertions(+), 1 deletions(-) create mode 100644 src/pci_region.c diff --git a/Makefile b/Makefile index 9d412f1..1663a5d 100644 --- a/Makefile +++ b/Makefile @@ -19,7 +19,8 @@ SRCBOTH=misc.c pmm.c stacks.c output.c util.c block.c floppy.c ata.c mouse.c \ SRC16=$(SRCBOTH) system.c disk.c font.c SRC32FLAT=$(SRCBOTH) post.c shadow.c memmap.c coreboot.c boot.c \ acpi.c smm.c mptable.c smbios.c pciinit.c optionroms.c mtrr.c \ - lzmadecode.c bootsplash.c jpeg.c usb-hub.c paravirt.c dev-i440fx.c + lzmadecode.c bootsplash.c jpeg.c usb-hub.c paravirt.c dev-i440fx.c \ + pci_region.c SRC32SEG=util.c output.c pci.c pcibios.c apm.c stacks.c cc-option = $(shell if test -z "`$(1) $(2) -S -o /dev/null -xc \ diff --git a/src/pci_region.c b/src/pci_region.c new file mode 100644 index 0000000..1d9de71 --- /dev/null +++ b/src/pci_region.c @@ -0,0 +1,77 @@ +// helper functions to manage pci io/memory/prefetch memory region +// +// Copyright (C) 2009 Isaku Yamahata +// +// This file may be distributed under the terms of the GNU LGPLv3 license. +// +// + +#include "util.h" + +#define PCI_REGION_DISABLED (-1) + +void pci_region_init(struct pci_region *r, u32 first, u32 last) +{ + r->first = first; + r->last = last; + + r->cur_first = r->first; +} + +// PCI_REGION_DISABLED represents that the region is in special state. +// its value is chosen such that cur_first can't be PCI_REGION_DISABLED +// normally. +// NOTE: the area right below 4G is used for LAPIC, so such area can't +// be used for PCI memory. +u32 pci_region_disable(struct pci_region *r) +{ + return r->cur_first = PCI_REGION_DISABLED; +} + +static int pci_region_disabled(const struct pci_region *r) +{ + return r->cur_first == PCI_REGION_DISABLED; +} + +static u32 pci_region_alloc_align(struct pci_region *r, u32 size, u32 align) +{ + if (pci_region_disabled(r)) { + return 0; + } + + u32 s = ALIGN(r->cur_first, align); + if (s > r->last || s < r->cur_first) { + return 0; + } + u32 e = s + size; + if (e < s || e - 1 > r->last) { + return 0; + } + r->cur_first = e; + return s; +} + +u32 pci_region_alloc(struct pci_region *r, u32 size) +{ + return pci_region_alloc_align(r, size, size); +} + +u32 pci_region_align(struct pci_region *r, u32 align) +{ + return pci_region_alloc_align(r, 0, align); +} + +void pci_region_revert(struct pci_region *r, u32 addr) +{ + r->cur_first = addr; +} + +u32 pci_region_addr(const struct pci_region *r) +{ + return r->cur_first; +} + +u32 pci_region_size(const struct pci_region *r) +{ + return r->last - r->first + 1; +} diff --git a/src/util.h b/src/util.h index 5cc9f17..18ab814 100644 --- a/src/util.h +++ b/src/util.h @@ -344,6 +344,35 @@ void qemu_prep_reset(void); void smm_save_and_copy(void); void smm_relocate_and_restore(void); +// pci_region.c +// region allocator. pci region allocates the requested region +// sequentially with overflow check. +struct pci_region { + // The region is [first, last]. + u32 first; + u32 last; + + // The next allocation starts from here. + // i.e. [start, cur_first) is allocated. + // Right after initialization cur_first == first. + u32 cur_first; +}; +// initialize the pci_region of [first, last] +// last must not be 0xffffffff +void pci_region_init(struct pci_region *r, u32 first, u32 last); +// allocate the region of size +u32 pci_region_alloc(struct pci_region *r, u32 size); +// make the next allocation aligned to align +u32 pci_region_align(struct pci_region *r, u32 align); +// revert the allocation to addr. +void pci_region_revert(struct pci_region *r, u32 addr); +// make the allocation fail. +u32 pci_region_disable(struct pci_region *r); +// returns the current allocation point. +u32 pci_region_addr(const struct pci_region *r); +// returns the region size. +u32 pci_region_size(const struct pci_region *r); + // pciinit.c extern const u8 pci_irqs[4]; void pci_bios_allocate_regions(u16 bdf, void *arg);