From patchwork Tue Jun 24 01:12:38 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 363281 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id E315214007D for ; Tue, 24 Jun 2014 11:16:13 +1000 (EST) Received: from localhost ([::1]:56971 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WzFLI-0004Vu-3F for incoming@patchwork.ozlabs.org; Mon, 23 Jun 2014 21:16:12 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44022) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WzFI2-0007OV-Cb for qemu-devel@nongnu.org; Mon, 23 Jun 2014 21:12:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WzFHw-000591-Dx for qemu-devel@nongnu.org; Mon, 23 Jun 2014 21:12:50 -0400 Received: from mail-yk0-x22b.google.com ([2607:f8b0:4002:c07::22b]:55884) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WzFHw-00058r-AE for qemu-devel@nongnu.org; Mon, 23 Jun 2014 21:12:44 -0400 Received: by mail-yk0-f171.google.com with SMTP id 200so5183748ykr.2 for ; Mon, 23 Jun 2014 18:12:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=zNPylcWDSfHjFflNuBlR3jfGHGwygcXS3b/sS0JHhvI=; b=fJNgf1g31MWMy7Tg8In0X9ymRcxE6lBxFdmbg4pGxdLkHMVpBwDkmEuXkEHl5a8pq4 YX+Vr8mZlLhpw7C2suXZbfEd3YGlul/4+E2w61807XeirL+UKFELCkInM3wO97w+cjjn 7h0mDOoC9O0wmYja2tfvhH4O4xCesWC/CC9fRQd3PfCXu9KyEOWdDdRxvWYiVFMVB3Fo 7Bv5XseUeqcOmD4eUN69nfqb2dqhIb7Z9kQQL8lMdGRbIc/QmhhXPJvyGkF/ssVFNcAg 9+B0fga7EOlcu633nQ2SKbDHGXPdx3PMC9lmlz8bhvOKgRkFLrqB90sSQKb1bMM5Fq7u 5BXA== X-Received: by 10.236.26.172 with SMTP id c32mr9277137yha.145.1403572364015; Mon, 23 Jun 2014 18:12:44 -0700 (PDT) Received: from localhost ([203.126.243.116]) by mx.google.com with ESMTPSA id b67sm32331516yhc.16.2014.06.23.18.12.41 for (version=TLSv1.1 cipher=RC4-SHA bits=128/128); Mon, 23 Jun 2014 18:12:43 -0700 (PDT) From: Alistair Francis To: qemu-devel@nongnu.org Date: Tue, 24 Jun 2014 11:12:38 +1000 Message-Id: <3217ac3f31ad96dd4811309d9a68e5af0886e628.1403572003.git.alistair.francis@xilinx.com> X-Mailer: git-send-email 1.9.0 In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:4002:c07::22b Cc: peter.maydell@linaro.org, peter.crosthwaite@xilinx.com, alistair.francis@xilinx.com Subject: [Qemu-devel] [PATCH v1 7/7] target-arm: Call the pmccntr_sync function when swapping ELs X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Call the new pmccntr_sync() function when there is a possibility of swapping ELs (I.E. when there is an exception) Signed-off-by: Alistair Francis --- target-arm/helper-a64.c | 5 +++++ target-arm/helper.c | 7 +++++++ target-arm/op_helper.c | 6 ++++++ 3 files changed, 18 insertions(+), 0 deletions(-) diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c index 2b4ce6a..b61174f 100644 --- a/target-arm/helper-a64.c +++ b/target-arm/helper-a64.c @@ -446,6 +446,8 @@ void aarch64_cpu_do_interrupt(CPUState *cs) target_ulong addr = env->cp15.vbar_el[1]; int i; + pmccntr_sync(env); + if (arm_current_pl(env) == 0) { if (env->aarch64) { addr += 0x400; @@ -484,6 +486,7 @@ void aarch64_cpu_do_interrupt(CPUState *cs) addr += 0x100; break; default: + pmccntr_sync(env); cpu_abort(cs, "Unhandled exception 0x%x\n", cs->exception_index); } @@ -511,4 +514,6 @@ void aarch64_cpu_do_interrupt(CPUState *cs) env->pc = addr; cs->interrupt_request |= CPU_INTERRUPT_EXITTB; + + pmccntr_sync(env); } diff --git a/target-arm/helper.c b/target-arm/helper.c index 3e0a9a1..7c0a57f 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -3417,6 +3417,8 @@ void arm_cpu_do_interrupt(CPUState *cs) assert(!IS_M(env)); + pmccntr_sync(env); + arm_log_exception(cs->exception_index); /* TODO: Vectored interrupt controller. */ @@ -3447,6 +3449,7 @@ void arm_cpu_do_interrupt(CPUState *cs) && (env->uncached_cpsr & CPSR_M) != ARM_CPU_MODE_USR) { env->regs[0] = do_arm_semihosting(env); qemu_log_mask(CPU_LOG_INT, "...handled as semihosting call\n"); + pmccntr_sync(env); return; } } @@ -3465,6 +3468,7 @@ void arm_cpu_do_interrupt(CPUState *cs) env->regs[15] += 2; env->regs[0] = do_arm_semihosting(env); qemu_log_mask(CPU_LOG_INT, "...handled as semihosting call\n"); + pmccntr_sync(env); return; } } @@ -3508,6 +3512,7 @@ void arm_cpu_do_interrupt(CPUState *cs) offset = 4; break; default: + pmccntr_sync(env); cpu_abort(cs, "Unhandled exception 0x%x\n", cs->exception_index); return; /* Never happens. Keep compiler happy. */ } @@ -3540,6 +3545,8 @@ void arm_cpu_do_interrupt(CPUState *cs) env->regs[14] = env->regs[15] + offset; env->regs[15] = addr; cs->interrupt_request |= CPU_INTERRUPT_EXITTB; + + pmccntr_sync(env); } /* Check section/page access permissions. diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c index 9c1ef52..07ab30b 100644 --- a/target-arm/op_helper.c +++ b/target-arm/op_helper.c @@ -376,6 +376,8 @@ void HELPER(exception_return)(CPUARMState *env) uint32_t spsr = env->banked_spsr[spsr_idx]; int new_el, i; + pmccntr_sync(env); + if (env->pstate & PSTATE_SP) { env->sp_el[cur_el] = env->xregs[31]; } else { @@ -418,6 +420,8 @@ void HELPER(exception_return)(CPUARMState *env) env->pc = env->elr_el[cur_el]; } + pmccntr_sync(env); + return; illegal_return: @@ -433,6 +437,8 @@ illegal_return: spsr &= PSTATE_NZCV | PSTATE_DAIF; spsr |= pstate_read(env) & ~(PSTATE_NZCV | PSTATE_DAIF); pstate_write(env, spsr); + + pmccntr_sync(env); } /* ??? Flag setting arithmetic is awkward because we need to do comparisons.