From patchwork Tue Sep 18 02:11:02 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peter A. G. Crosthwaite" X-Patchwork-Id: 184590 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 24C3E2C008A for ; Tue, 18 Sep 2012 12:35:50 +1000 (EST) Received: from localhost ([::1]:51723 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TDnIz-000642-SG for incoming@patchwork.ozlabs.org; Mon, 17 Sep 2012 22:12:53 -0400 Received: from eggs.gnu.org ([208.118.235.92]:45702) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TDnIJ-0004bL-U1 for qemu-devel@nongnu.org; Mon, 17 Sep 2012 22:12:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TDnII-0004QU-BA for qemu-devel@nongnu.org; Mon, 17 Sep 2012 22:12:11 -0400 Received: from mail-ob0-f173.google.com ([209.85.214.173]:38380) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TDnII-0004NA-6D for qemu-devel@nongnu.org; Mon, 17 Sep 2012 22:12:10 -0400 Received: by mail-ob0-f173.google.com with SMTP id ta14so9259606obb.4 for ; Mon, 17 Sep 2012 19:12:10 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :in-reply-to:references:x-gm-message-state; bh=B6CLX6cKPlJtLRGap7BBMtyLFzOI1dJLYb6Di0MMX0M=; b=BKVu5FUx+ljAFSpJB2IIdFpl/svd+lLpDZDD6gdqSfciqkjNLR2RFN7s/3DbzK1Pmb M0CVCoTgFEEr8sljXYz0bKw1q59GMIgR2nPS96Pf5dJJQl3jjasCkMdfgw/NyTBk1xlk n2z+9xzE5zV7aA/pAxyaqv4BfOUUjV7mKQT5/+7A/NFKC5gqJoDq0s15WXHnFeI0RjhI Bu5blIhkkZ+sEwy2WNQcjuqjh9XO2LePPXgNNB05KnSAqKRjy5/nN2Tfy3pNEMkRnmFa omyBJVianMKt9IUMTDmB3Xe3gRLlAZXKRZwI1G9Q/zPud1vUaVnNiseoh4NmFHDIzcnH 7u/g== Received: by 10.60.19.132 with SMTP id f4mr13877781oee.17.1347934329947; Mon, 17 Sep 2012 19:12:09 -0700 (PDT) Received: from localhost ([124.148.20.9]) by mx.google.com with ESMTPS id th3sm12801800obb.6.2012.09.17.19.12.06 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 17 Sep 2012 19:12:09 -0700 (PDT) From: "Peter A. G. Crosthwaite" To: qemu-devel@nongnu.org, paul@codesourcery.com, edgar.iglesias@gmail.com, peter.maydell@linaro.org, stefanha@gmail.com Date: Tue, 18 Sep 2012 12:11:02 +1000 Message-Id: <29c8db3372d637eea132b2a30184a53eb2cbcce3.1347932427.git.peter.crosthwaite@petalogix.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: References: In-Reply-To: References: X-Gm-Message-State: ALoCoQn3Hhaz8SjUQy3+nLQ4su80z1/cjMrzAeVi/dhYDsp25qOfFEc4dzvgedFSA/u/AmoLhykD X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.214.173 Cc: "Peter A. G. Crosthwaite" , i.mitsyanko@samsung.com Subject: [Qemu-devel] [PATCH v6 05/13] hw/stellaris: Removed gpio_out init array. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org stellaris_init() defines arrays of qemu_irq to decides what each of the GPIO pins are connected to. This is ok for inputs (as an input can only have one source) but is flawed for outputs as an output can connect to any number of sinks. Removed the gpio_out array completely and just replaced its setters with direct calls to qdev_connect_gpio_out(). Signed-off-by: Peter A. G. Crosthwaite --- hw/stellaris.c | 26 ++++++++++++-------------- 1 files changed, 12 insertions(+), 14 deletions(-) diff --git a/hw/stellaris.c b/hw/stellaris.c index 01050d1..a7b68f4 100644 --- a/hw/stellaris.c +++ b/hw/stellaris.c @@ -1244,7 +1244,6 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model, qemu_irq *pic; DeviceState *gpio_dev[7]; qemu_irq gpio_in[7][8]; - qemu_irq gpio_out[7][8]; qemu_irq adc; int sram_size; int flash_size; @@ -1284,8 +1283,9 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model, pic[gpio_irq[i]]); for (j = 0; j < 8; j++) { gpio_in[i][j] = qdev_get_gpio_in(gpio_dev[i], j); - gpio_out[i][j] = NULL; } + } else { + gpio_dev[i] = NULL; } } @@ -1308,20 +1308,27 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model, if (board->peripherals & BP_OLED_SSI) { DeviceState *mux; void *bus; + qemu_irq select_pin; bus = qdev_get_child_bus(dev, "ssi"); mux = ssi_create_slave(bus, "evb6965-ssi"); - gpio_out[GPIO_D][0] = qdev_get_gpio_in(mux, 0); + select_pin = qdev_get_gpio_in(mux, 0); + if (gpio_dev[GPIO_D]) { + qdev_connect_gpio_out(gpio_dev[GPIO_D], 0, select_pin); + } bus = qdev_get_child_bus(mux, "ssi0"); ssi_create_slave(bus, "ssi-sd"); bus = qdev_get_child_bus(mux, "ssi1"); dev = ssi_create_slave(bus, "ssd0323"); - gpio_out[GPIO_C][7] = qdev_get_gpio_in(dev, 0); + if (gpio_dev[GPIO_C]) { + qdev_connect_gpio_out(gpio_dev[GPIO_C], 7, + qdev_get_gpio_in(dev, 0)); + } /* Make sure the select pin is high. */ - qemu_irq_raise(gpio_out[GPIO_D][0]); + qemu_irq_raise(select_pin); } } if (board->dc4 & (1 << 28)) { @@ -1347,15 +1354,6 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model, stellaris_gamepad_init(5, gpad_irq, gpad_keycode); } - for (i = 0; i < 7; i++) { - if (board->dc4 & (1 << i)) { - for (j = 0; j < 8; j++) { - if (gpio_out[i][j]) { - qdev_connect_gpio_out(gpio_dev[i], j, gpio_out[i][j]); - } - } - } - } } /* FIXME: Figure out how to generate these from stellaris_boards. */