From patchwork Thu Feb 24 17:57:17 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Juan Quintela X-Patchwork-Id: 84454 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id B3601B7105 for ; Fri, 25 Feb 2011 06:09:27 +1100 (EST) Received: from localhost ([127.0.0.1]:48469 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PsgZ2-0003Pz-M1 for incoming@patchwork.ozlabs.org; Thu, 24 Feb 2011 14:09:24 -0500 Received: from [140.186.70.92] (port=59430 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PsgJA-0004nP-HC for qemu-devel@nongnu.org; Thu, 24 Feb 2011 13:53:01 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PsgJ9-0007Yf-4T for qemu-devel@nongnu.org; Thu, 24 Feb 2011 13:53:00 -0500 Received: from mx1.redhat.com ([209.132.183.28]:62079) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PsgJ8-0007WT-PE for qemu-devel@nongnu.org; Thu, 24 Feb 2011 13:52:59 -0500 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p1OHwRPg015162 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Thu, 24 Feb 2011 12:58:27 -0500 Received: from trasno.mitica (ovpn-113-97.phx2.redhat.com [10.3.113.97]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id p1OHw0jU014622; Thu, 24 Feb 2011 12:58:26 -0500 From: Juan Quintela To: qemu-devel@nongnu.org Date: Thu, 24 Feb 2011 18:57:17 +0100 Message-Id: <24489c764dcf44f398a1e745801fd9044dd573e2.1298569508.git.quintela@redhat.com> In-Reply-To: References: In-Reply-To: References: X-Scanned-By: MIMEDefang 2.68 on 10.5.11.23 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 20/58] vmstate: port pxa2xx_pic X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Juan Quintela --- hw/pxa2xx_pic.c | 52 ++++++++++++++++++++-------------------------------- 1 files changed, 20 insertions(+), 32 deletions(-) diff --git a/hw/pxa2xx_pic.c b/hw/pxa2xx_pic.c index a36da23..d1015ab 100644 --- a/hw/pxa2xx_pic.c +++ b/hw/pxa2xx_pic.c @@ -241,41 +241,30 @@ static CPUWriteMemoryFunc * const pxa2xx_pic_writefn[] = { pxa2xx_pic_mem_write, }; -static void pxa2xx_pic_save(QEMUFile *f, void *opaque) +static int pxa2xx_pic_post_load(void *opaque, int version_id) { - PXA2xxPICState *s = (PXA2xxPICState *) opaque; - int i; - - for (i = 0; i < 2; i ++) - qemu_put_be32s(f, &s->int_enabled[i]); - for (i = 0; i < 2; i ++) - qemu_put_be32s(f, &s->int_pending[i]); - for (i = 0; i < 2; i ++) - qemu_put_be32s(f, &s->is_fiq[i]); - qemu_put_be32s(f, &s->int_idle); - for (i = 0; i < PXA2XX_PIC_SRCS; i ++) - qemu_put_be32s(f, &s->priority[i]); -} - -static int pxa2xx_pic_load(QEMUFile *f, void *opaque, int version_id) -{ - PXA2xxPICState *s = (PXA2xxPICState *) opaque; - int i; - - for (i = 0; i < 2; i ++) - qemu_get_be32s(f, &s->int_enabled[i]); - for (i = 0; i < 2; i ++) - qemu_get_be32s(f, &s->int_pending[i]); - for (i = 0; i < 2; i ++) - qemu_get_be32s(f, &s->is_fiq[i]); - qemu_get_be32s(f, &s->int_idle); - for (i = 0; i < PXA2XX_PIC_SRCS; i ++) - qemu_get_be32s(f, &s->priority[i]); + PXA2xxPICState *s = opaque; - pxa2xx_pic_update(opaque); + pxa2xx_pic_update(s); return 0; } +static const VMStateDescription vmstate_pxa2xx_pic = { + .name = "pxa2xx_mmci", + .version_id = 0, + .minimum_version_id = 0, + .minimum_version_id_old = 0, + .post_load = pxa2xx_pic_post_load, + .fields = (VMStateField[]) { + VMSTATE_UINT32_ARRAY(int_enabled, PXA2xxPICState, 2), + VMSTATE_UINT32_ARRAY(int_pending, PXA2xxPICState, 2), + VMSTATE_UINT32_ARRAY(is_fiq, PXA2xxPICState, 2), + VMSTATE_UINT32(int_idle, PXA2xxPICState), + VMSTATE_UINT32_ARRAY(priority, PXA2xxPICState, PXA2XX_PIC_SRCS), + VMSTATE_END_OF_LIST() + } +}; + qemu_irq *pxa2xx_pic_init(target_phys_addr_t base, CPUState *env) { PXA2xxPICState *s; @@ -306,8 +295,7 @@ qemu_irq *pxa2xx_pic_init(target_phys_addr_t base, CPUState *env) /* Enable IC coprocessor access. */ cpu_arm_set_cp_io(env, 6, pxa2xx_pic_cp_read, pxa2xx_pic_cp_write, s); - register_savevm(NULL, "pxa2xx_pic", 0, 0, pxa2xx_pic_save, - pxa2xx_pic_load, s); + vmstate_register(NULL, 0, &vmstate_pxa2xx_pic, s); return qi; }