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Mon, 07 Oct 2024 18:19:30 -0700 (PDT) Date: Mon, 7 Oct 2024 18:18:46 -0700 In-Reply-To: <20241008011852.1439154-1-tavip@google.com> Mime-Version: 1.0 References: <20241008011852.1439154-1-tavip@google.com> X-Mailer: git-send-email 2.47.0.rc0.187.ge670bccf7e-goog Message-ID: <20241008011852.1439154-21-tavip@google.com> Subject: [PATCH v2 20/25] tests/qtest: add tests for flexcomm i2c From: Octavian Purdila To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, stefanst@google.com, pbonzini@redhat.com, peter.maydell@linaro.org, marcandre.lureau@redhat.com, berrange@redhat.com, eduardo@habkost.net, luc@lmichel.fr, damien.hedde@dahe.fr, alistair@alistair23.me, thuth@redhat.com, philmd@linaro.org, jsnow@redhat.com, crosa@redhat.com, lvivier@redhat.com Received-SPF: pass client-ip=2607:f8b0:4864:20::b49; envelope-from=3oogEZwUKCgUyf0nulttlqj.htrvjrz-ij0jqstslsz.twl@flex--tavip.bounces.google.com; helo=mail-yb1-xb49.google.com X-Spam_score_int: -95 X-Spam_score: -9.6 X-Spam_bar: --------- X-Spam_report: (-9.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.024, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, USER_IN_DEF_DKIM_WL=-7.5 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Add master mode tests for flexcomm i2c. Signed-off-by: Octavian Purdila --- tests/qtest/flexcomm-i2c-test.c | 170 ++++++++++++++++++++++++++++++++ tests/qtest/meson.build | 2 +- 2 files changed, 171 insertions(+), 1 deletion(-) create mode 100644 tests/qtest/flexcomm-i2c-test.c diff --git a/tests/qtest/flexcomm-i2c-test.c b/tests/qtest/flexcomm-i2c-test.c new file mode 100644 index 0000000000..45f31da7de --- /dev/null +++ b/tests/qtest/flexcomm-i2c-test.c @@ -0,0 +1,170 @@ +/* + * Copyright (c) 2024 Google LLC. + * + * SPDX-License-Identifier: GPL-2.0-or-later + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#include "qemu/osdep.h" + +#include "qemu/config-file.h" +#include "qemu/log.h" +#include "qemu/module.h" +#include "qapi/error.h" +#include "qemu/sockets.h" +#include "sysemu/sysemu.h" +#include "qemu/main-loop.h" +#include "qemu/option.h" +#include "exec/memory.h" +#include "hw/irq.h" +#include "hw/qdev-properties.h" +#include "hw/qdev-core.h" + +#include "hw/misc/flexcomm.h" +#include "hw/arm/svd/flexcomm_i2c.h" +#include "hw/arm/svd/rt500.h" +#include "hw/misc/i2c_tester.h" +#include "reg-utils.h" + +#define PERIPH_ADDR (0x50) +#define INVALID_ADDR (0x10) + +#define REG_ADDR 11 +#define REG_VALUE 0xAA + +#define FLEXCOMM_BASE RT500_FLEXCOMM0_BASE +#define FLEXCOMM_I2C_BASE RT500_FLEXCOMM0_BASE +#define DEVICE_NAME "/machine/soc/flexcomm0" + +struct TestState { + QTestState *qtest; +}; + +static void master_test(gconstpointer user_data) +{ + struct TestState *t = (struct TestState *)user_data; + uint32_t tmp; + + qtest_irq_intercept_out_named(t->qtest, DEVICE_NAME, + SYSBUS_DEVICE_GPIO_IRQ); + + /* Select and lock I2C */ + tmp = FLEXCOMM_PERSEL_I2C; + FIELD_DP32(tmp, FLEXCOMM_PSELID, LOCK, 1); + REG32_WRITE(FLEXCOMM, PSELID, tmp); + + /* Enable master mode */ + REG32_WRITE_FIELD(FLEXCOMM_I2C, CFG, MSTEN, 1); + g_assert(REG32_READ_FIELD(FLEXCOMM_I2C, CFG, MSTEN) == 1); + + g_assert(REG32_READ_FIELD(FLEXCOMM_I2C, STAT, MSTPENDING) == 1); + g_assert(REG32_READ_FIELD(FLEXCOMM_I2C, STAT, MSTSTATE) == + MSTSTATE_IDLE); + + /* Enable interrupts */ + REG32_WRITE_FIELD(FLEXCOMM_I2C, INTENSET, MSTPENDINGEN, 1); + g_assert_true(get_irq(0)); + + /* start for invalid address */ + REG32_WRITE(FLEXCOMM_I2C, MSTDAT, INVALID_ADDR); + REG32_WRITE_FIELD_NOUPDATE(FLEXCOMM_I2C, MSTCTL, MSTSTART, 1); + g_assert(REG32_READ_FIELD(FLEXCOMM_I2C, STAT, MSTSTATE) == + MSTSTATE_NAKADR); + g_assert_true(get_irq(0)); + REG32_WRITE_FIELD_NOUPDATE(FLEXCOMM_I2C, MSTCTL, MSTSTOP, 1); + + /* write past the last register */ + REG32_WRITE_FIELD(FLEXCOMM_I2C, MSTDAT, DATA, PERIPH_ADDR); + REG32_WRITE_FIELD_NOUPDATE(FLEXCOMM_I2C, MSTCTL, MSTSTART, 1); + g_assert_true(get_irq(0)); + g_assert(REG32_READ_FIELD(FLEXCOMM_I2C, STAT, MSTSTATE) == + MSTSTATE_TXRDY); + REG32_WRITE_FIELD(FLEXCOMM_I2C, MSTDAT, DATA, I2C_TESTER_NUM_REGS + 10); + REG32_WRITE_FIELD_NOUPDATE(FLEXCOMM_I2C, MSTCTL, MSTCONTINUE, 1); + g_assert_true(get_irq(0)); + g_assert(REG32_READ_FIELD(FLEXCOMM_I2C, STAT, MSTSTATE) == + MSTSTATE_TXRDY); + REG32_WRITE_FIELD_NOUPDATE(FLEXCOMM_I2C, MSTCTL, MSTCONTINUE, 1); + g_assert_true(get_irq(0)); + g_assert(REG32_READ_FIELD(FLEXCOMM_I2C, STAT, MSTSTATE) == + MSTSTATE_NAKDAT); + REG32_WRITE_FIELD_NOUPDATE(FLEXCOMM_I2C, MSTCTL, MSTSTOP, 1); + + /* write value to register */ + REG32_WRITE_FIELD(FLEXCOMM_I2C, MSTDAT, DATA, PERIPH_ADDR); + REG32_WRITE_FIELD_NOUPDATE(FLEXCOMM_I2C, MSTCTL, MSTSTART, 1); + g_assert_true(get_irq(0)); + g_assert(REG32_READ_FIELD(FLEXCOMM_I2C, STAT, MSTSTATE) == + MSTSTATE_TXRDY); + REG32_WRITE_FIELD(FLEXCOMM_I2C, MSTDAT, DATA, REG_ADDR); + REG32_WRITE_FIELD_NOUPDATE(FLEXCOMM_I2C, MSTCTL, MSTCONTINUE, 1); + g_assert_true(get_irq(0)); + g_assert(REG32_READ_FIELD(FLEXCOMM_I2C, STAT, MSTSTATE) == + MSTSTATE_TXRDY); + REG32_WRITE_FIELD(FLEXCOMM_I2C, MSTDAT, DATA, REG_VALUE); + REG32_WRITE_FIELD_NOUPDATE(FLEXCOMM_I2C, MSTCTL, MSTCONTINUE, 1); + g_assert_true(get_irq(0)); + g_assert(REG32_READ_FIELD(FLEXCOMM_I2C, STAT, MSTSTATE) == + MSTSTATE_TXRDY); + REG32_WRITE_FIELD_NOUPDATE(FLEXCOMM_I2C, MSTCTL, MSTSTOP, 1); + g_assert_true(get_irq(0)); + g_assert(REG32_READ_FIELD(FLEXCOMM_I2C, STAT, MSTSTATE) == + MSTSTATE_IDLE); + + /* read value back from register */ + REG32_WRITE_FIELD(FLEXCOMM_I2C, MSTDAT, DATA, PERIPH_ADDR); + REG32_WRITE_FIELD_NOUPDATE(FLEXCOMM_I2C, MSTCTL, MSTSTART, 1); + g_assert_true(get_irq(0)); + g_assert(REG32_READ_FIELD(FLEXCOMM_I2C, STAT, MSTSTATE) == + MSTSTATE_TXRDY); + REG32_WRITE_FIELD(FLEXCOMM_I2C, MSTDAT, DATA, REG_ADDR); + REG32_WRITE_FIELD_NOUPDATE(FLEXCOMM_I2C, MSTCTL, MSTCONTINUE, 1); + g_assert_true(get_irq(0)); + g_assert(REG32_READ_FIELD(FLEXCOMM_I2C, STAT, MSTSTATE) == + MSTSTATE_TXRDY); + REG32_WRITE_FIELD(FLEXCOMM_I2C, MSTDAT, DATA, (PERIPH_ADDR + 1)); + REG32_WRITE_FIELD_NOUPDATE(FLEXCOMM_I2C, MSTCTL, MSTSTART, 1); + g_assert_true(get_irq(0)); + g_assert(REG32_READ_FIELD(FLEXCOMM_I2C, STAT, MSTSTATE) == + MSTSTATE_RXRDY); + g_assert_cmpuint(REG32_READ_FIELD(FLEXCOMM_I2C, MSTDAT, DATA), ==, + REG_VALUE); + REG32_WRITE_FIELD_NOUPDATE(FLEXCOMM_I2C, MSTCTL, MSTSTOP, 1); + + /* + * Check that the master ended the transaction (i.e. i2c_end_transfer was + * called). If the master does not properly end the transaction this would + * be seen as a restart and it would not be NACKed. + */ + REG32_WRITE_FIELD(FLEXCOMM_I2C, MSTDAT, DATA, INVALID_ADDR); + REG32_WRITE_FIELD_NOUPDATE(FLEXCOMM_I2C, MSTCTL, MSTSTART, 1); + + g_assert(REG32_READ_FIELD(FLEXCOMM_I2C, STAT, MSTSTATE) == + MSTSTATE_NAKADR); + g_assert_true(get_irq(0)); + REG32_WRITE_FIELD_NOUPDATE(FLEXCOMM_I2C, MSTCTL, MSTSTOP, 1); + + /* Disable interrupts */ + REG32_WRITE_FIELD(FLEXCOMM_I2C, INTENCLR, MSTPENDINGCLR, 1); + g_assert_false(get_irq(0)); +} + +int main(int argc, char **argv) +{ + int ret; + struct TestState test; + + module_call_init(MODULE_INIT_QOM); + g_test_init(&argc, &argv, NULL); + + qtest_add_data_func("/flexcomm-i2c/master", &test, master_test); + + test.qtest = qtest_start("-M rt595-evk " + "-device i2c-tester,address=0x50,bus=/flexcomm0-i2c"); + ret = g_test_run(); + qtest_end(); + + return ret; +} diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build index c7a5bb61e9..c21b18c304 100644 --- a/tests/qtest/meson.build +++ b/tests/qtest/meson.build @@ -233,7 +233,7 @@ qtests_arm = \ (config_all_devices.has_key('CONFIG_FSI_APB2OPB_ASPEED') ? ['aspeed_fsi-test'] : []) + \ (config_all_devices.has_key('CONFIG_STM32L4X5_SOC') and config_all_devices.has_key('CONFIG_DM163')? ['dm163-test'] : []) + \ - (config_all_devices.has_key('CONFIG_FLEXCOMM') ? ['flexcomm-test', 'flexcomm-usart-test'] : []) + \ + (config_all_devices.has_key('CONFIG_FLEXCOMM') ? ['flexcomm-test', 'flexcomm-usart-test', 'flexcomm-i2c-test'] : []) + \ ['arm-cpu-features', 'boot-serial-test']