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Mon, 07 Oct 2024 10:23:26 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGohh+NaEkNIBY6fL4ijRLI7VnZDTJC17SLnNWYGHaWve0B2v7ocFcD4zd/zsepcs4VGK1mUw== X-Received: by 2002:a7b:c454:0:b0:42c:b995:20c8 with SMTP id 5b1f17b1804b1-42f877baf34mr84170025e9.24.1728321805985; Mon, 07 Oct 2024 10:23:25 -0700 (PDT) Received: from avogadro.local ([151.62.111.131]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42f8a05173dsm80547955e9.5.2024.10.07.10.23.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Oct 2024 10:23:25 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: mjt@tls.msk.ru, alex.bennee@linaro.org, richard.henderson@linaro.org, qemu-stable@nongnu.org Subject: [PATCH 2/2] meson: ensure -mcx16 is passed when detecting ATOMIC128 Date: Mon, 7 Oct 2024 19:23:16 +0200 Message-ID: <20241007172317.1439564-3-pbonzini@redhat.com> X-Mailer: git-send-email 2.46.1 In-Reply-To: <20241007172317.1439564-1-pbonzini@redhat.com> References: <20241007172317.1439564-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.153, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Moving -mcx16 out of CPU_CFLAGS caused the detection of ATOMIC128 to fail, because flags have to be specified by hand in cc.compiles and cc.links invocations (why oh why??). Ensure that these tests enable all the instruction set extensions that will be used to build the emulators. Fixes: c2bf2ccb266 ("configure: move -mcx16 flag out of CPU_CFLAGS", 2024-05-24) Reported-by: Alex Bennée Reviewed-by: Michael Tokarev Reviewed-by: Alex Bennée Tested-by: Alex Bennée Cc: qemu-stable@nongnu.org Signed-off-by: Paolo Bonzini --- meson.build | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/meson.build b/meson.build index 65ea45cef03..e4b2af138da 100644 --- a/meson.build +++ b/meson.build @@ -2831,7 +2831,7 @@ config_host_data.set('CONFIG_ATOMIC64', cc.links(''' __atomic_exchange_n(&x, y, __ATOMIC_RELAXED); __atomic_fetch_add(&x, y, __ATOMIC_RELAXED); return 0; - }''')) + }''', args: qemu_isa_flags)) has_int128_type = cc.compiles(''' __int128_t a; @@ -2865,7 +2865,7 @@ if has_int128_type __atomic_compare_exchange_n(&p[4], &p[5], p[6], 0, __ATOMIC_RELAXED, __ATOMIC_RELAXED); return 0; }''' - has_atomic128 = cc.links(atomic_test_128) + has_atomic128 = cc.links(atomic_test_128, args: qemu_isa_flags) config_host_data.set('CONFIG_ATOMIC128', has_atomic128) @@ -2874,7 +2874,8 @@ if has_int128_type # without optimization enabled. Try again with optimizations locally # enabled for the function. See # https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107389 - has_atomic128_opt = cc.links('__attribute__((optimize("O1")))' + atomic_test_128) + has_atomic128_opt = cc.links('__attribute__((optimize("O1")))' + atomic_test_128, + args: qemu_isa_flags) config_host_data.set('CONFIG_ATOMIC128_OPT', has_atomic128_opt) if not has_atomic128_opt @@ -2885,7 +2886,7 @@ if has_int128_type __sync_val_compare_and_swap_16(&x, y, x); return 0; } - ''')) + ''', args: qemu_isa_flags)) endif endif endif