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[217.94.215.144]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42f86a0afc1sm47506775e9.1.2024.10.05.12.47.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 05 Oct 2024 12:47:02 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Daniel Henrique Barboza , Nicholas Piggin , Bin Meng , Corey Minyard , Bernhard Beschow , qemu-ppc@nongnu.org, Alex Williamson , Hanna Reitz , Jason Wang , qemu-block@nongnu.org, Kevin Wolf , =?utf-8?q?Philippe_Ma?= =?utf-8?q?thieu-Daud=C3=A9?= , =?utf-8?q?C=C3=A9dric_Le_?= =?utf-8?q?Goater?= Subject: [PATCH v2 07/23] hw/ppc/e500: Extract ppce500_ccsr.c Date: Sat, 5 Oct 2024 21:45:47 +0200 Message-ID: <20241005194603.23139-8-shentey@gmail.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241005194603.23139-1-shentey@gmail.com> References: <20241005194603.23139-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=shentey@gmail.com; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The device model already has a header file, so extract its implementation into an accompanying source file like other e500 devices. While at it rename the header file to reflect the name of the structure defined there. This commit is also a preparation for the next commit. Signed-off-by: Bernhard Beschow --- MAINTAINERS | 2 +- hw/ppc/{e500-ccsr.h => ppce500_ccsr.h} | 8 +++--- hw/ppc/e500.c | 21 ++-------------- hw/ppc/ppce500_ccsr.c | 34 ++++++++++++++++++++++++++ hw/ppc/meson.build | 1 + 5 files changed, 42 insertions(+), 24 deletions(-) rename hw/ppc/{e500-ccsr.h => ppce500_ccsr.h} (71%) create mode 100644 hw/ppc/ppce500_ccsr.c diff --git a/MAINTAINERS b/MAINTAINERS index 34fffcb5be..f1755c8ad8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1382,7 +1382,7 @@ M: Bernhard Beschow L: qemu-ppc@nongnu.org S: Odd Fixes F: hw/ppc/e500* -F: hw/ppc/ppce500_spin.c +F: hw/ppc/ppce500_* F: hw/gpio/mpc8xxx.c F: hw/i2c/mpc_i2c.c F: hw/net/fsl_etsec/ diff --git a/hw/ppc/e500-ccsr.h b/hw/ppc/ppce500_ccsr.h similarity index 71% rename from hw/ppc/e500-ccsr.h rename to hw/ppc/ppce500_ccsr.h index 249c17be3b..36cbb811ca 100644 --- a/hw/ppc/e500-ccsr.h +++ b/hw/ppc/ppce500_ccsr.h @@ -1,13 +1,13 @@ -#ifndef E500_CCSR_H -#define E500_CCSR_H +#ifndef PPCE500_CCSR_H +#define PPCE500_CCSR_H #include "hw/sysbus.h" #include "qom/object.h" +#define MPC85XX_CCSRBAR_SIZE 0x00100000ULL + struct PPCE500CCSRState { - /*< private >*/ SysBusDevice parent; - /*< public >*/ MemoryRegion ccsr_space; }; diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 2225533e33..74836ebb64 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -20,7 +20,7 @@ #include "qemu/guest-random.h" #include "qapi/error.h" #include "e500.h" -#include "e500-ccsr.h" +#include "ppce500_ccsr.h" #include "net/net.h" #include "qemu/config-file.h" #include "hw/block/flash.h" @@ -61,7 +61,6 @@ #define RAM_SIZES_ALIGN (64 * MiB) /* TODO: parameterize */ -#define MPC8544_CCSRBAR_SIZE 0x00100000ULL #define MPC8544_MPIC_REGS_OFFSET 0x40000ULL #define MPC8544_MSI_REGS_OFFSET 0x41600ULL #define MPC8544_SERIAL0_REGS_OFFSET 0x4500ULL @@ -532,7 +531,7 @@ static int ppce500_load_device_tree(PPCE500MachineState *pms, qemu_fdt_setprop_cell(fdt, soc, "#size-cells", 1); qemu_fdt_setprop_cells(fdt, soc, "ranges", 0x0, pmc->ccsrbar_base >> 32, pmc->ccsrbar_base, - MPC8544_CCSRBAR_SIZE); + MPC85XX_CCSRBAR_SIZE); /* XXX should contain a reasonable value */ qemu_fdt_setprop_cell(fdt, soc, "bus-frequency", 0); @@ -1264,21 +1263,6 @@ void ppce500_init(MachineState *machine) pms->boot_info.dt_size = dt_size; } -static void e500_ccsr_initfn(Object *obj) -{ - PPCE500CCSRState *ccsr = CCSR(obj); - memory_region_init(&ccsr->ccsr_space, obj, "e500-ccsr", - MPC8544_CCSRBAR_SIZE); - sysbus_init_mmio(SYS_BUS_DEVICE(ccsr), &ccsr->ccsr_space); -} - -static const TypeInfo e500_ccsr_info = { - .name = TYPE_CCSR, - .parent = TYPE_SYS_BUS_DEVICE, - .instance_size = sizeof(PPCE500CCSRState), - .instance_init = e500_ccsr_initfn, -}; - static const TypeInfo ppce500_info = { .name = TYPE_PPCE500_MACHINE, .parent = TYPE_MACHINE, @@ -1289,7 +1273,6 @@ static const TypeInfo ppce500_info = { static void e500_register_types(void) { - type_register_static(&e500_ccsr_info); type_register_static(&ppce500_info); } diff --git a/hw/ppc/ppce500_ccsr.c b/hw/ppc/ppce500_ccsr.c new file mode 100644 index 0000000000..5d0e1e0e89 --- /dev/null +++ b/hw/ppc/ppce500_ccsr.c @@ -0,0 +1,34 @@ +/* + * QEMU PowerPC E500 embedded processors CCSR space emulation + * + * Copyright (C) 2009 Freescale Semiconductor, Inc. All rights reserved. + * + * Author: Yu Liu, + * + * This is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include "qemu/osdep.h" +#include "ppce500_ccsr.h" + +static void ppce500_ccsr_init(Object *obj) +{ + PPCE500CCSRState *s = CCSR(obj); + + memory_region_init(&s->ccsr_space, obj, "e500-ccsr", MPC85XX_CCSRBAR_SIZE); + sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->ccsr_space); +} + +static const TypeInfo types[] = { + { + .name = TYPE_CCSR, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(PPCE500CCSRState), + .instance_init = ppce500_ccsr_init, + }, +}; + +DEFINE_TYPES(types) diff --git a/hw/ppc/meson.build b/hw/ppc/meson.build index 7cd9189869..43c746795a 100644 --- a/hw/ppc/meson.build +++ b/hw/ppc/meson.build @@ -81,6 +81,7 @@ ppc_ss.add(when: 'CONFIG_MPC8544DS', if_true: files('mpc8544ds.c')) ppc_ss.add(when: 'CONFIG_E500', if_true: files( 'e500.c', 'mpc8544_guts.c', + 'ppce500_ccsr.c', 'ppce500_spin.c' )) # PowerPC 440 Xilinx ML507 reference board.