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[92.88.170.46]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a93c27c5aadsm593218966b.79.2024.09.30.15.07.33 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 30 Sep 2024 15:07:34 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Magnus Damm , Thomas Huth , Yoshinori Sato , Anton Johansson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH] hw/sh4/r2d: Replace tswap32() by stl_endian_p() Date: Tue, 1 Oct 2024 00:07:32 +0200 Message-ID: <20240930220732.58757-1-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62e; envelope-from=philmd@linaro.org; helo=mail-ej1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Replace the target-specific tswap32() calls by stl_endian_p() which does the same but takes the endianness as argument, thus is target-agnostic. Signed-off-by: Philippe Mathieu-Daudé --- Based-on: <20240930073450.33195-2-philmd@linaro.org> "qemu/bswap: Introduce ld/st_endian_p() API" --- hw/sh4/r2d.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c index e5ac6751bd..6739ac435a 100644 --- a/hw/sh4/r2d.c +++ b/hw/sh4/r2d.c @@ -353,9 +353,11 @@ static void r2d_init(MachineState *machine) } /* initialization which should be done by firmware */ - boot_params.loader_type = tswap32(1); - boot_params.initrd_start = tswap32(INITRD_LOAD_OFFSET); - boot_params.initrd_size = tswap32(initrd_size); + stl_endian_p(TARGET_BIG_ENDIAN, &boot_params.loader_type, 1); + stl_endian_p(TARGET_BIG_ENDIAN, &boot_params.initrd_start, + INITRD_LOAD_OFFSET); + stl_endian_p(TARGET_BIG_ENDIAN, &boot_params.initrd_size, + initrd_size); } if (kernel_cmdline) {