diff mbox series

[6/9] i386/cpu: Set topology info in 0x80000008.ECX only for AMD CPUs

Message ID 20240814075431.339209-7-xiaoyao.li@intel.com
State New
Headers show
Series Misc patches for x86 CPUID | expand

Commit Message

Xiaoyao Li Aug. 14, 2024, 7:54 a.m. UTC
The whole ECX of CPUID 0x80000008 is reserved for Intel.

Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
---
 target/i386/cpu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Chenyi Qiang Aug. 14, 2024, 11:47 a.m. UTC | #1
On 8/14/2024 3:54 PM, Xiaoyao Li wrote:
> The whole ECX of CPUID 0x80000008 is reserved for Intel.
> 
> Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
> ---
>  target/i386/cpu.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 5bee84333089..7a4835289760 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -6944,7 +6944,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
>               *eax |= (cpu->guest_phys_bits << 16);
>          }
>          *ebx = env->features[FEAT_8000_0008_EBX];
> -        if (threads_per_pkg > 1) {
> +        if (threads_per_pkg > 1 && IS_AMD_CPU(env)) {

Is it necessary to add the check like:

if (thread_per_pkg > 1 &&
    (IS_AMD_CPU(env) || !cpu->vendor_cpuid_only))

for compatibility with older machine types?

>              /*
>               * Bits 15:12 is "The number of bits in the initial
>               * Core::X86::Apic::ApicId[ApicId] value that indicate
diff mbox series

Patch

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 5bee84333089..7a4835289760 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -6944,7 +6944,7 @@  void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
              *eax |= (cpu->guest_phys_bits << 16);
         }
         *ebx = env->features[FEAT_8000_0008_EBX];
-        if (threads_per_pkg > 1) {
+        if (threads_per_pkg > 1 && IS_AMD_CPU(env)) {
             /*
              * Bits 15:12 is "The number of bits in the initial
              * Core::X86::Apic::ApicId[ApicId] value that indicate