@@ -39,6 +39,8 @@ struct LoongsonIPICommonState {
struct LoongsonIPICommonClass {
SysBusDeviceClass parent_class;
+
+ AddressSpace *(*get_iocsr_as)(CPUState *cpu);
};
/* Mainy used by iocsr read and write */
@@ -75,24 +75,30 @@ static MemTxResult loongson_ipi_iocsr_readl(void *opaque, hwaddr addr,
return loongson_ipi_core_readl(s, addr, data, size, attrs);
}
-static AddressSpace *get_cpu_iocsr_as(CPUState *cpu)
-{
#ifdef TARGET_LOONGARCH64
+static AddressSpace *get_iocsr_as(CPUState *cpu)
+{
return LOONGARCH_CPU(cpu)->env.address_space_iocsr;
+}
#endif
+
#ifdef TARGET_MIPS
+static AddressSpace *get_iocsr_as(CPUState *cpu)
+{
if (ase_lcsr_available(&MIPS_CPU(cpu)->env)) {
return &MIPS_CPU(cpu)->env.iocsr.as;
}
-#endif
+
return NULL;
}
+#endif
static MemTxResult send_ipi_data(LoongsonIPICommonState *ipi, CPUState *cpu,
uint64_t val, hwaddr addr, MemTxAttrs attrs)
{
+ LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_GET_CLASS(ipi);
int i, mask = 0, data = 0;
- AddressSpace *iocsr_as = get_cpu_iocsr_as(cpu);
+ AddressSpace *iocsr_as = licc->get_iocsr_as(cpu);
if (!iocsr_as) {
return MEMTX_DECODE_ERROR;
@@ -354,11 +360,13 @@ static void loongson_ipi_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
LoongsonIPIClass *lic = LOONGSON_IPI_CLASS(klass);
+ LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_CLASS(klass);
device_class_set_parent_realize(dc, loongson_ipi_realize,
&lic->parent_realize);
device_class_set_parent_unrealize(dc, loongson_ipi_unrealize,
&lic->parent_unrealize);
+ licc->get_iocsr_as = get_iocsr_as;
}
static const TypeInfo loongson_ipi_types[] = {