diff mbox series

[02/13] pnv/xive2: Define OGEN field in the TIMA

Message ID 20240801203008.11224-3-kowal@linux.ibm.com
State New
Headers show
Series XIVE2 changes for TIMA operations | expand

Commit Message

Mike Kowal Aug. 1, 2024, 8:29 p.m. UTC 
From: Frederic Barrat <fbarrat@linux.ibm.com>

The OGEN field at offset 0x1F is a new field for Gen2 TIMA. This
patch defines it.

Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Signed-off-by: Michael Kowal <kowal@linux.vnet.ibm.com>
---
 include/hw/ppc/xive_regs.h | 1 +
 hw/intc/xive.c             | 4 ++++
 2 files changed, 5 insertions(+)

Comments

Cédric Le Goater Aug. 26, 2024, 10:14 a.m. UTC | #1 
On 8/1/24 22:29, Michael Kowal wrote:
> From: Frederic Barrat <fbarrat@linux.ibm.com>
> 
> The OGEN field at offset 0x1F is a new field for Gen2 TIMA. This
> patch defines it.
> 
> Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
> Signed-off-by: Michael Kowal <kowal@linux.vnet.ibm.com>


Reviewed-by: Cédric Le Goater <clg@redhat.com>

Thanks,

C.



> ---
>   include/hw/ppc/xive_regs.h | 1 +
>   hw/intc/xive.c             | 4 ++++
>   2 files changed, 5 insertions(+)
> 
> diff --git a/include/hw/ppc/xive_regs.h b/include/hw/ppc/xive_regs.h
> index 9d52d464d9..9062c6abf6 100644
> --- a/include/hw/ppc/xive_regs.h
> +++ b/include/hw/ppc/xive_regs.h
> @@ -79,6 +79,7 @@
>   #define TM_INC                  0x5  /*  -   +   -   +  */
>   #define TM_AGE                  0x6  /*  -   +   -   +  */
>   #define TM_PIPR                 0x7  /*  -   +   -   +  */
> +#define TM_OGEN                 0xF  /*  -   +   -   -  */ /* P10 only */
>   
>   #define TM_WORD0                0x0
>   #define TM_WORD1                0x4
> diff --git a/hw/intc/xive.c b/hw/intc/xive.c
> index 2fb38e2102..136d82338a 100644
> --- a/hw/intc/xive.c
> +++ b/hw/intc/xive.c
> @@ -742,6 +742,10 @@ void xive_tctx_reset(XiveTCTX *tctx)
>       tctx->regs[TM_QW1_OS + TM_LSMFB] = 0xFF;
>       tctx->regs[TM_QW1_OS + TM_ACK_CNT] = 0xFF;
>       tctx->regs[TM_QW1_OS + TM_AGE] = 0xFF;
> +    if (!(xive_presenter_get_config(tctx->xptr) &
> +          XIVE_PRESENTER_GEN1_TIMA_OS)) {
> +        tctx->regs[TM_QW1_OS + TM_OGEN] = 2;
> +    }
>   
>       /*
>        * Initialize PIPR to 0xFF to avoid phantom interrupts when the
diff mbox series

Patch

diff --git a/include/hw/ppc/xive_regs.h b/include/hw/ppc/xive_regs.h
index 9d52d464d9..9062c6abf6 100644
--- a/include/hw/ppc/xive_regs.h
+++ b/include/hw/ppc/xive_regs.h
@@ -79,6 +79,7 @@ 
 #define TM_INC                  0x5  /*  -   +   -   +  */
 #define TM_AGE                  0x6  /*  -   +   -   +  */
 #define TM_PIPR                 0x7  /*  -   +   -   +  */
+#define TM_OGEN                 0xF  /*  -   +   -   -  */ /* P10 only */
 
 #define TM_WORD0                0x0
 #define TM_WORD1                0x4
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index 2fb38e2102..136d82338a 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -742,6 +742,10 @@  void xive_tctx_reset(XiveTCTX *tctx)
     tctx->regs[TM_QW1_OS + TM_LSMFB] = 0xFF;
     tctx->regs[TM_QW1_OS + TM_ACK_CNT] = 0xFF;
     tctx->regs[TM_QW1_OS + TM_AGE] = 0xFF;
+    if (!(xive_presenter_get_config(tctx->xptr) &
+          XIVE_PRESENTER_GEN1_TIMA_OS)) {
+        tctx->regs[TM_QW1_OS + TM_OGEN] = 2;
+    }
 
     /*
      * Initialize PIPR to 0xFF to avoid phantom interrupts when the