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Sun, 07 Jul 2024 12:11:48 -0700 (PDT) Received: from localhost.localdomain ([106.222.220.84]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1fac11d8a70sm172156725ad.118.2024.07.07.12.11.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 07 Jul 2024 12:11:47 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Warner Losh , Stacey Son , Ajeet Singh , Kyle Evans Subject: [PATCH v2 5/8] bsd-user:Add get_mcontext function for ARM AArch64 Date: Mon, 8 Jul 2024 00:41:25 +0530 Message-Id: <20240707191128.10509-6-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240707191128.10509-1-itachis@FreeBSD.org> References: <20240707191128.10509-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::632; envelope-from=itachis6234@gmail.com; helo=mail-pl1-x632.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Stacey Son function to retrieve machine context,it populates the provided target_mcontext_t structure with information from the CPUARMState registers. Signed-off-by: Stacey Son Signed-off-by: Ajeet Singh Co-authored-by: Kyle Evans Reviewed-by: Richard Henderson --- bsd-user/aarch64/signal.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/bsd-user/aarch64/signal.c b/bsd-user/aarch64/signal.c index 98861f9ab3..ab3bf8558a 100644 --- a/bsd-user/aarch64/signal.c +++ b/bsd-user/aarch64/signal.c @@ -51,3 +51,33 @@ abi_long set_sigtramp_args(CPUARMState *regs, int sig, return 0; } + +/* + * Compare to get_mcontext() in arm64/arm64/machdep.c + * Assumes that the memory is locked if mcp points to user memory. + */ +abi_long get_mcontext(CPUARMState *regs, target_mcontext_t *mcp, int flags) +{ + int err = 0, i; + uint64_t *gr = mcp->mc_gpregs.gp_x; + + mcp->mc_gpregs.gp_spsr = pstate_read(regs); + if (flags & TARGET_MC_GET_CLEAR_RET) { + gr[0] = 0UL; + mcp->mc_gpregs.gp_spsr &= ~CPSR_C; + } else { + gr[0] = tswap64(regs->xregs[0]); + } + + for (i = 1; i < 30; i++) { + gr[i] = tswap64(regs->xregs[i]); + } + + mcp->mc_gpregs.gp_sp = tswap64(regs->xregs[TARGET_REG_SP]); + mcp->mc_gpregs.gp_lr = tswap64(regs->xregs[TARGET_REG_LR]); + mcp->mc_gpregs.gp_elr = tswap64(regs->pc); + + /* XXX FP? */ + + return err; +}