Message ID | 20240705153052.1219696-17-alex.bennee@linaro.org |
---|---|
State | New |
Headers | show
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Fri, 05 Jul 2024 08:31:06 -0700 (PDT) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a77d56ccb8csm46718666b.200.2024.07.05.08.30.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Jul 2024 08:31:04 -0700 (PDT) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 8B4C56211A; Fri, 5 Jul 2024 16:30:54 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= <alex.bennee@linaro.org> To: qemu-devel@nongnu.org Cc: Akihiko Odaki <akihiko.odaki@daynix.com>, Richard Henderson <richard.henderson@linaro.org>, =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= <alex.bennee@linaro.org>, Peter Maydell <peter.maydell@linaro.org>, qemu-arm@nongnu.org (open list:ARM TCG CPUs) Subject: [PULL 16/40] tests/tcg/arm: Manually register allocate half-precision numbers Date: Fri, 5 Jul 2024 16:30:28 +0100 Message-Id: <20240705153052.1219696-17-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240705153052.1219696-1-alex.bennee@linaro.org> References: <20240705153052.1219696-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; 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Series |
[PULL,01/40] tests/lcitool: fix debian-i686-cross toolchain prefix
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diff --git a/tests/tcg/arm/fcvt.c b/tests/tcg/arm/fcvt.c index 157790e679..d8c61cd29f 100644 --- a/tests/tcg/arm/fcvt.c +++ b/tests/tcg/arm/fcvt.c @@ -355,7 +355,12 @@ static void convert_half_to_single(void) print_half_number(i, input); #if defined(__arm__) - asm("vcvtb.f32.f16 %0, %1" : "=w" (output) : "x" ((uint32_t)input)); + /* + * Clang refuses to allocate an integer to a fp register. + * Perform the move from a general register by hand. + */ + asm("vmov %0, %1\n\t" + "vcvtb.f32.f16 %0, %0" : "=w" (output) : "r" (input)); #else asm("fcvt %s0, %h1" : "=w" (output) : "w" (input)); #endif