Message ID | 20240628124258.832466-17-alex.bennee@linaro.org |
---|---|
State | New |
Headers | show
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Fri, 28 Jun 2024 05:51:53 -0700 (PDT) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a72aaf18c83sm77927866b.4.2024.06.28.05.51.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Jun 2024 05:51:53 -0700 (PDT) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 8697C5FA3D; Fri, 28 Jun 2024 13:43:00 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= <alex.bennee@linaro.org> To: qemu-devel@nongnu.org Cc: David Hildenbrand <david@redhat.com>, Beraldo Leal <bleal@redhat.com>, Eduardo Habkost <eduardo@habkost.net>, =?utf-8?q?Alex_Benn=C3=A9e?= <alex.bennee@linaro.org>, Wainer dos Santos Moschetta <wainersm@redhat.com>, qemu-arm@nongnu.org, Peter Xu <peterx@redhat.com>, Mads Ynddal <mads@ynddal.dk>, Mahmoud Mandour <ma.mandourr@gmail.com>, Pierrick Bouvier <pierrick.bouvier@linaro.org>, Laurent Vivier <laurent@vivier.eu>, Paolo Bonzini <pbonzini@redhat.com>, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <philmd@linaro.org>, Alexandre Iooss <erdnaxe@crans.org>, Stefan Hajnoczi <stefanha@redhat.com>, Peter Maydell <peter.maydell@linaro.org>, Richard Henderson <richard.henderson@linaro.org>, Thomas Huth <thuth@redhat.com>, Gustavo Romero <gustavo.romero@linaro.org> Subject: [PATCH 16/23] target/arm: Fix exception case in allocation_tag_mem_probe Date: Fri, 28 Jun 2024 13:42:51 +0100 Message-Id: <20240628124258.832466-17-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240628124258.832466-1-alex.bennee@linaro.org> References: <20240628124258.832466-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; 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Series |
July maintainer updates (32bit, testing, plugins, gdbstub)
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diff --git a/target/arm/tcg/mte_helper.c b/target/arm/tcg/mte_helper.c index 037ac6dd60..a50d576294 100644 --- a/target/arm/tcg/mte_helper.c +++ b/target/arm/tcg/mte_helper.c @@ -96,6 +96,9 @@ static uint8_t *allocation_tag_mem_probe(CPUARMState *env, int ptr_mmu_idx, assert(!(probe && ra)); if (!(flags & (ptr_access == MMU_DATA_STORE ? PAGE_WRITE_ORG : PAGE_READ))) { + if (probe) { + return NULL; + } cpu_loop_exit_sigsegv(env_cpu(env), ptr, ptr_access, !(flags & PAGE_VALID), ra); }