diff mbox series

[2/6] tests/tcg/aarch64: Fix test architecture specification

Message ID 20240626-tcg-v1-2-0bad656307d8@daynix.com
State New
Headers show
Series tests/tcg/aarch64: Fix inline assemblies for clang | expand

Commit Message

Akihiko Odaki June 26, 2024, 11:26 a.m. UTC 
sme-smopa-2.c requires sme-i16i64 but the compiler option used not to
specify it. Instead, the extension was specified with the inline
assembly, resulting in mixing assembly code targeting sme-i1664 and C
code that does not target sme-i1664.

clang version 18.1.6 does not support such mixing so properly specify
the extension with the compiler option instead.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
---
 tests/tcg/aarch64/sme-smopa-2.c   |  2 +-
 tests/tcg/aarch64/Makefile.target | 12 ++++++++++--
 2 files changed, 11 insertions(+), 3 deletions(-)

Comments

Alex Bennée June 26, 2024, 4:12 p.m. UTC | #1 
Akihiko Odaki <akihiko.odaki@daynix.com> writes:

> sme-smopa-2.c requires sme-i16i64 but the compiler option used not to
> specify it. Instead, the extension was specified with the inline
> assembly, resulting in mixing assembly code targeting sme-i1664 and C
> code that does not target sme-i1664.
>
> clang version 18.1.6 does not support such mixing so properly specify
> the extension with the compiler option instead.

I think we need fixes for older clangs supported by our distros as well:

  16:08:26 [alex@aarch64:~/l/q/b/all.clang] plugins/next|✚1…(+0/-0) 2 + clang --version
  Ubuntu clang version 14.0.0-1ubuntu1.1
  Target: aarch64-unknown-linux-gnu
  Thread model: posix
  InstalledDir: /usr/bin

Gives:

  tests/tcg/aarch64-linux-user: -Wa,-march=armv9-a+sme-i16i64 detected
  /home/alex/lsrc/qemu.git/tests/tcg/aarch64/sme-smopa-1.c:17:19: error: instruction requires: sve or sme
          "smstart\n\t"
                    ^
  <inline asm>:3:2: note: instantiated into assembly here
          index z0.b, #0, #1
          ^
  /home/alex/lsrc/qemu.git/tests/tcg/aarch64/sme-smopa-1.c:18:30: error: instruction requires: sve or sme
          "index z0.b, #0, #1\n\t"
                               ^
  <inline asm>:4:2: note: instantiated into assembly here
          movprfx z1, z0
          ^
  /home/alex/lsrc/qemu.git/tests/tcg/aarch64/sme-smopa-1.c:19:26: error: instruction requires: sve or sme
          "movprfx z1, z0\n\t"
                           ^
  <inline asm>:5:2: note: instantiated into assembly here
          add z1.b, z1.b, #16
          ^
  /home/alex/lsrc/qemu.git/tests/tcg/aarch64/sme-smopa-1.c:20:31: error: instruction requires: sve or sme
          "add z1.b, z1.b, #16\n\t"
                                ^
  <inline asm>:6:2: note: instantiated into assembly here
          ptrue p0.b
          ^
  /home/alex/lsrc/qemu.git/tests/tcg/aarch64/sme-smopa-1.c:22:47: error: instruction requires: sve or sme
          "smopa za0.s, p0/m, p0/m, z0.b, z1.b\n\t"
                                                ^
  <inline asm>:8:2: note: instantiated into assembly here
          ptrue p0.s, vl4
          ^
  5 errors generated.

>
> Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
> ---
>  tests/tcg/aarch64/sme-smopa-2.c   |  2 +-
>  tests/tcg/aarch64/Makefile.target | 12 ++++++++++--
>  2 files changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/tests/tcg/aarch64/sme-smopa-2.c b/tests/tcg/aarch64/sme-smopa-2.c
> index c9f48c3bfca2..2c9707065992 100644
> --- a/tests/tcg/aarch64/sme-smopa-2.c
> +++ b/tests/tcg/aarch64/sme-smopa-2.c
> @@ -14,7 +14,7 @@ int main()
>      long svl;
>  
>      /* Validate that we have a wide enough vector for 4 elements. */
> -    asm(".arch armv8-r+sme-i64\n\trdsvl %0, #1" : "=r"(svl));
> +    asm("rdsvl %0, #1" : "=r"(svl));
>      if (svl < 32) {
>          return 0;
>      }
> diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
> index 70d728ae9af7..f53a1d615c21 100644
> --- a/tests/tcg/aarch64/Makefile.target
> +++ b/tests/tcg/aarch64/Makefile.target
> @@ -27,7 +27,8 @@ config-cc.mak: Makefile
>  	    $(call cc-option,-march=armv8.5-a,              CROSS_CC_HAS_ARMV8_5); \
>  	    $(call cc-option,-mbranch-protection=standard,  CROSS_CC_HAS_ARMV8_BTI); \
>  	    $(call cc-option,-march=armv8.5-a+memtag,       CROSS_CC_HAS_ARMV8_MTE); \
> -	    $(call cc-option,-Wa$(COMMA)-march=armv9-a+sme, CROSS_AS_HAS_ARMV9_SME)) 3> config-cc.mak
> +	    $(call cc-option,-Wa$(COMMA)-march=armv9-a+sme, CROSS_AS_HAS_ARMV9_SME); \
> +	    $(call cc-option,-Wa$(COMMA)-march=armv9-a+sme-i16i64, CROSS_AS_HAS_ARMV9_SME_I1664)) 3> config-cc.mak
>  -include config-cc.mak
>  
>  ifneq ($(CROSS_CC_HAS_ARMV8_2),)
> @@ -68,7 +69,14 @@ endif
>  
>  # SME Tests
>  ifneq ($(CROSS_AS_HAS_ARMV9_SME),)
> -AARCH64_TESTS += sme-outprod1 sme-smopa-1 sme-smopa-2
> +AARCH64_TESTS += sme-outprod1 sme-smopa-1
> +sme-%: CFLAGS += -march=armv9-a+sme
> +endif
> +
> +# SME I16I64 Tests
> +ifneq ($(CROSS_AS_HAS_ARMV9_SME_I1664),)
> +AARCH64_TESTS += sme-smopa-2
> +sme-smopa-2: CFLAGS += -march=armv9-a+sme-i16i64+sme
>  endif
>  
>  # System Registers Tests
Alex Bennée June 26, 2024, 4:15 p.m. UTC | #2 
Akihiko Odaki <akihiko.odaki@daynix.com> writes:

> sme-smopa-2.c requires sme-i16i64 but the compiler option used not to
> specify it. Instead, the extension was specified with the inline
> assembly, resulting in mixing assembly code targeting sme-i1664 and C
> code that does not target sme-i1664.
>
> clang version 18.1.6 does not support such mixing so properly specify
> the extension with the compiler option instead.

Also with gcc on aarch64.ci.qemu.org (Ubuntu 22.04.4 LTS) I get:

  16:05:44 [alex@aarch64:~/l/q/b/all] plugins/next|✚1…(+0/-0) + make run-tcg-tests-aarch64-linux-user
  ninja: no work to do.
  /home/alex/lsrc/qemu.git/builds/all/pyvenv/bin/meson introspect --targets --tests --benchmarks | /home/alex/lsrc/qemu.git/builds/all/pyvenv/bin/python3 -B scripts/mtest2make.py > Makefile.mtest
    BUILD   aarch64-linux-user guest-tests
  tests/tcg/aarch64-linux-user: -march=armv8.1-a+sve detected
  tests/tcg/aarch64-linux-user: -march=armv8.1-a+sve2 detected
  tests/tcg/aarch64-linux-user: -march=armv8.2-a detected
  tests/tcg/aarch64-linux-user: -march=armv8.3-a detected
  tests/tcg/aarch64-linux-user: -march=armv8.5-a detected
  tests/tcg/aarch64-linux-user: -mbranch-protection=standard detected
  tests/tcg/aarch64-linux-user: -march=armv8.5-a+memtag detected
  tests/tcg/aarch64-linux-user: -Wa,-march=armv9-a+sme detected
  tests/tcg/aarch64-linux-user: -Wa,-march=armv9-a+sme-i16i64 not detected
  cc1: error: unknown value ‘armv9-a+sme’ for ‘-march’
  cc1: note: valid arguments are: armv8-a armv8.1-a armv8.2-a armv8.3-a armv8.4-a armv8.5-a armv8.6-a armv8-r native
  make[1]: *** [Makefile:116: sme-outprod1] Error 1
  make: *** [/home/alex/lsrc/qemu.git/tests/Makefile.include:50: build-tcg-tests-aarch64-linux-user] Error 2
  16:08:32 [alex@aarch64:~/l/q/b/all] plugins/next|✚1…(+0/-0) 2 + 
>
> Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
> ---
>  tests/tcg/aarch64/sme-smopa-2.c   |  2 +-
>  tests/tcg/aarch64/Makefile.target | 12 ++++++++++--
>  2 files changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/tests/tcg/aarch64/sme-smopa-2.c b/tests/tcg/aarch64/sme-smopa-2.c
> index c9f48c3bfca2..2c9707065992 100644
> --- a/tests/tcg/aarch64/sme-smopa-2.c
> +++ b/tests/tcg/aarch64/sme-smopa-2.c
> @@ -14,7 +14,7 @@ int main()
>      long svl;
>  
>      /* Validate that we have a wide enough vector for 4 elements. */
> -    asm(".arch armv8-r+sme-i64\n\trdsvl %0, #1" : "=r"(svl));
> +    asm("rdsvl %0, #1" : "=r"(svl));
>      if (svl < 32) {
>          return 0;
>      }
> diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
> index 70d728ae9af7..f53a1d615c21 100644
> --- a/tests/tcg/aarch64/Makefile.target
> +++ b/tests/tcg/aarch64/Makefile.target
> @@ -27,7 +27,8 @@ config-cc.mak: Makefile
>  	    $(call cc-option,-march=armv8.5-a,              CROSS_CC_HAS_ARMV8_5); \
>  	    $(call cc-option,-mbranch-protection=standard,  CROSS_CC_HAS_ARMV8_BTI); \
>  	    $(call cc-option,-march=armv8.5-a+memtag,       CROSS_CC_HAS_ARMV8_MTE); \
> -	    $(call cc-option,-Wa$(COMMA)-march=armv9-a+sme, CROSS_AS_HAS_ARMV9_SME)) 3> config-cc.mak
> +	    $(call cc-option,-Wa$(COMMA)-march=armv9-a+sme, CROSS_AS_HAS_ARMV9_SME); \
> +	    $(call cc-option,-Wa$(COMMA)-march=armv9-a+sme-i16i64, CROSS_AS_HAS_ARMV9_SME_I1664)) 3> config-cc.mak
>  -include config-cc.mak
>  
>  ifneq ($(CROSS_CC_HAS_ARMV8_2),)
> @@ -68,7 +69,14 @@ endif
>  
>  # SME Tests
>  ifneq ($(CROSS_AS_HAS_ARMV9_SME),)
> -AARCH64_TESTS += sme-outprod1 sme-smopa-1 sme-smopa-2
> +AARCH64_TESTS += sme-outprod1 sme-smopa-1
> +sme-%: CFLAGS += -march=armv9-a+sme
> +endif
> +
> +# SME I16I64 Tests
> +ifneq ($(CROSS_AS_HAS_ARMV9_SME_I1664),)
> +AARCH64_TESTS += sme-smopa-2
> +sme-smopa-2: CFLAGS += -march=armv9-a+sme-i16i64+sme
>  endif
>  
>  # System Registers Tests
diff mbox series

Patch

diff --git a/tests/tcg/aarch64/sme-smopa-2.c b/tests/tcg/aarch64/sme-smopa-2.c
index c9f48c3bfca2..2c9707065992 100644
--- a/tests/tcg/aarch64/sme-smopa-2.c
+++ b/tests/tcg/aarch64/sme-smopa-2.c
@@ -14,7 +14,7 @@  int main()
     long svl;
 
     /* Validate that we have a wide enough vector for 4 elements. */
-    asm(".arch armv8-r+sme-i64\n\trdsvl %0, #1" : "=r"(svl));
+    asm("rdsvl %0, #1" : "=r"(svl));
     if (svl < 32) {
         return 0;
     }
diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
index 70d728ae9af7..f53a1d615c21 100644
--- a/tests/tcg/aarch64/Makefile.target
+++ b/tests/tcg/aarch64/Makefile.target
@@ -27,7 +27,8 @@  config-cc.mak: Makefile
 	    $(call cc-option,-march=armv8.5-a,              CROSS_CC_HAS_ARMV8_5); \
 	    $(call cc-option,-mbranch-protection=standard,  CROSS_CC_HAS_ARMV8_BTI); \
 	    $(call cc-option,-march=armv8.5-a+memtag,       CROSS_CC_HAS_ARMV8_MTE); \
-	    $(call cc-option,-Wa$(COMMA)-march=armv9-a+sme, CROSS_AS_HAS_ARMV9_SME)) 3> config-cc.mak
+	    $(call cc-option,-Wa$(COMMA)-march=armv9-a+sme, CROSS_AS_HAS_ARMV9_SME); \
+	    $(call cc-option,-Wa$(COMMA)-march=armv9-a+sme-i16i64, CROSS_AS_HAS_ARMV9_SME_I1664)) 3> config-cc.mak
 -include config-cc.mak
 
 ifneq ($(CROSS_CC_HAS_ARMV8_2),)
@@ -68,7 +69,14 @@  endif
 
 # SME Tests
 ifneq ($(CROSS_AS_HAS_ARMV9_SME),)
-AARCH64_TESTS += sme-outprod1 sme-smopa-1 sme-smopa-2
+AARCH64_TESTS += sme-outprod1 sme-smopa-1
+sme-%: CFLAGS += -march=armv9-a+sme
+endif
+
+# SME I16I64 Tests
+ifneq ($(CROSS_AS_HAS_ARMV9_SME_I1664),)
+AARCH64_TESTS += sme-smopa-2
+sme-smopa-2: CFLAGS += -march=armv9-a+sme-i16i64+sme
 endif
 
 # System Registers Tests