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Mon, 17 Jun 2024 11:59:08 -0700 (PDT) Received: from localhost.localdomain ([106.222.222.115]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-705ccb4aa4fsm7660637b3a.131.2024.06.17.11.59.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jun 2024 11:59:08 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Warner Losh , Ajeet Singh , Stacey Son , Ajeet Singh Subject: [PATCH 23/23] Add get_ucontext_sigreturn function Date: Tue, 18 Jun 2024 00:28:04 +0530 Message-Id: <20240617185804.25075-24-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240617185804.25075-1-itachis@FreeBSD.org> References: <20240617185804.25075-1-itachis@FreeBSD.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::429; envelope-from=itachis6234@gmail.com; helo=mail-pf1-x429.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Stacey Son Function checks the processor state to ensure that the current execution mode is EL0 and no flags indicating interrupts or exceptions are set Signed-off-by: Stacey Son Signed-off-by: Ajeet Singh --- bsd-user/aarch64/signal.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/bsd-user/aarch64/signal.c b/bsd-user/aarch64/signal.c index 13faac8ce6..ad81531ec5 100644 --- a/bsd-user/aarch64/signal.c +++ b/bsd-user/aarch64/signal.c @@ -117,3 +117,21 @@ abi_long set_mcontext(CPUARMState *regs, target_mcontext_t *mcp, int srflag) return err; } + +/* Compare to sys_sigreturn() in arm64/arm64/machdep.c */ +abi_long get_ucontext_sigreturn(CPUARMState *regs, abi_ulong target_sf, + abi_ulong *target_uc) +{ + uint32_t pstate = pstate_read(regs); + + *target_uc = 0; + + if ((pstate & PSTATE_M) != PSTATE_MODE_EL0t || + (pstate & (PSTATE_F | PSTATE_I | PSTATE_A | PSTATE_D)) != 0) { + return -TARGET_EINVAL; + } + + *target_uc = target_sf; + + return 0; +}