| Message ID | 20240531091457.42200-6-pbonzini@redhat.com |
|---|---|
| State | New |
| Headers | show |
| Series | host/i386: require x86-64-v2 ISA | expand |
On Fri, May 31, 2024 at 11:14:56AM +0200, Paolo Bonzini wrote: > Date: Fri, 31 May 2024 11:14:56 +0200 > From: Paolo Bonzini <pbonzini@redhat.com> > Subject: [PATCH 5/6] host/i386: assume presence of SSSE3 > X-Mailer: git-send-email 2.45.1 > > QEMU now requires an x86-64-v2 host, which has SSSE3 instructions > (notably, PSHUFB which is used by QEMU's AES implementation). > Do not bother checking it. > > Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> > --- > util/cpuinfo-i386.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
diff --git a/util/cpuinfo-i386.c b/util/cpuinfo-i386.c index ca74ef04f54..b413075b9f2 100644 --- a/util/cpuinfo-i386.c +++ b/util/cpuinfo-i386.c @@ -38,8 +38,8 @@ unsigned __attribute__((constructor)) cpuinfo_init(void) info |= (c & bit_POPCNT ? CPUINFO_POPCNT : 0); info |= (c & bit_PCLMUL ? CPUINFO_PCLMUL : 0); - /* Our AES support requires PSHUFB as well. */ - info |= ((c & bit_AES) && (c & bit_SSSE3) ? CPUINFO_AES : 0); + /* NOTE: our AES support requires SSSE3 (PSHUFB) as well. */ + info |= (c & bit_AES) ? CPUINFO_AES : 0; /* For AVX features, we must check available and usable. */ if ((c & bit_AVX) && (c & bit_OSXSAVE)) {
QEMU now requires an x86-64-v2 host, which has SSSE3 instructions (notably, PSHUFB which is used by QEMU's AES implementation). Do not bother checking it. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> --- util/cpuinfo-i386.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)