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Fri, 31 May 2024 02:15:05 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFEm1OsF/9rnnYAYYHeV1/tTodgTufJ7dm8/QfqTnE+fYChYNF9ytShMHMQnos3aV60pXekjQ== X-Received: by 2002:a50:d596:0:b0:574:eb69:fadf with SMTP id 4fb4d7f45d1cf-57a3656455fmr818263a12.36.1717146904570; Fri, 31 May 2024 02:15:04 -0700 (PDT) Received: from avogadro.local ([151.81.115.112]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-57a31c6d4absm768793a12.72.2024.05.31.02.15.03 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 May 2024 02:15:03 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PATCH 2/6] meson: assume x86-64-v2 baseline ISA Date: Fri, 31 May 2024 11:14:53 +0200 Message-ID: <20240531091457.42200-3-pbonzini@redhat.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240531091457.42200-1-pbonzini@redhat.com> References: <20240531091457.42200-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.085, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org x86-64-v2 processors were released in 2008, assume that we have one. Unfortunately there is no GCC flag to enable all the features without disabling what came after; so enable them one by one. Signed-off-by: Paolo Bonzini Reviewed-by: Zhao Liu --- meson.build | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/meson.build b/meson.build index 63866071445..19d1fc1f33b 100644 --- a/meson.build +++ b/meson.build @@ -336,9 +336,13 @@ if host_arch == 'i386' and not cc.links(''' qemu_common_flags = ['-march=i486'] + qemu_common_flags endif -# ??? Only extremely old AMD cpus do not have cmpxchg16b. -# If we truly care, we should simply detect this case at -# runtime and generate the fallback to serial emulation. +# Assume x86-64-v2 (minus CMPXCHG16B for 32-bit code) +if host_arch == 'i386' + qemu_common_flags = ['-mfpmath=sse'] + qemu_common_flags +endif +if host_arch in ['i386', 'x86_64'] + qemu_common_flags = ['-mpopcnt', '-msse4.2'] + qemu_common_flags +endif if host_arch == 'x86_64' qemu_common_flags = ['-mcx16'] + qemu_common_flags endif