| Message ID | 20240414130604.182059-3-ines.varhol@telecom-paris.fr |
|---|---|
| State | New |
| Headers | show |
| Series | Add device DM163 (led driver, matrix colors shield & display) | expand |
Hi Inès, On 14/4/24 15:05, Inès Varhol wrote: > Exposing SYSCFG inputs to the SoC is practical in order to wire the SoC > to the optional DM163 display from the board code (GPIOs outputs need > to be connected to both SYSCFG inputs and DM163 inputs). > > STM32L4x5 SYSCFG in-irq interception needed to be changed accordingly. > > Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr> > Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> > --- > hw/arm/stm32l4x5_soc.c | 6 ++++-- > tests/qtest/stm32l4x5_gpio-test.c | 12 +++++++----- > tests/qtest/stm32l4x5_syscfg-test.c | 16 +++++++++------- > 3 files changed, 20 insertions(+), 14 deletions(-) > > diff --git a/hw/arm/stm32l4x5_soc.c b/hw/arm/stm32l4x5_soc.c > index 40e294f838..c4b45e6956 100644 > --- a/hw/arm/stm32l4x5_soc.c > +++ b/hw/arm/stm32l4x5_soc.c > @@ -1,8 +1,8 @@ > /* > * STM32L4x5 SoC family > * > - * Copyright (c) 2023 Arnaud Minier <arnaud.minier@telecom-paris.fr> > - * Copyright (c) 2023 Inès Varhol <ines.varhol@telecom-paris.fr> > + * Copyright (c) 2024 Arnaud Minier <arnaud.minier@telecom-paris.fr> > + * Copyright (c) 2024 Inès Varhol <ines.varhol@telecom-paris.fr> You can keep 2023-2024. > * > * SPDX-License-Identifier: GPL-2.0-or-later > * > @@ -221,6 +221,8 @@ static void stm32l4x5_soc_realize(DeviceState *dev_soc, Error **errp) > } > } > > + qdev_pass_gpios(DEVICE(&s->syscfg), dev_soc, NULL); > + > /* EXTI device */ > busdev = SYS_BUS_DEVICE(&s->exti); > if (!sysbus_realize(busdev, errp)) { > diff --git a/tests/qtest/stm32l4x5_gpio-test.c b/tests/qtest/stm32l4x5_gpio-test.c > index 0f6bda54d3..495a6fc413 100644 > --- a/tests/qtest/stm32l4x5_gpio-test.c > +++ b/tests/qtest/stm32l4x5_gpio-test.c > @@ -43,6 +43,8 @@ > #define OTYPER_PUSH_PULL 0 > #define OTYPER_OPEN_DRAIN 1 > > +#define SYSCFG "/machine/soc" Can we have a comment such /* SoC forwards GPIOs to SysCfg */? (Similar comments for stm32l4x5_syscfg-test.c).
On 15/4/24 11:29, Philippe Mathieu-Daudé wrote: > Hi Inès, > > On 14/4/24 15:05, Inès Varhol wrote: >> Exposing SYSCFG inputs to the SoC is practical in order to wire the SoC >> to the optional DM163 display from the board code (GPIOs outputs need >> to be connected to both SYSCFG inputs and DM163 inputs). >> >> STM32L4x5 SYSCFG in-irq interception needed to be changed accordingly. >> >> Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr> >> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> >> --- >> hw/arm/stm32l4x5_soc.c | 6 ++++-- >> tests/qtest/stm32l4x5_gpio-test.c | 12 +++++++----- >> tests/qtest/stm32l4x5_syscfg-test.c | 16 +++++++++------- >> 3 files changed, 20 insertions(+), 14 deletions(-) >> >> diff --git a/hw/arm/stm32l4x5_soc.c b/hw/arm/stm32l4x5_soc.c >> index 40e294f838..c4b45e6956 100644 >> --- a/hw/arm/stm32l4x5_soc.c >> +++ b/hw/arm/stm32l4x5_soc.c >> @@ -1,8 +1,8 @@ >> /* >> * STM32L4x5 SoC family >> * >> - * Copyright (c) 2023 Arnaud Minier <arnaud.minier@telecom-paris.fr> >> - * Copyright (c) 2023 Inès Varhol <ines.varhol@telecom-paris.fr> >> + * Copyright (c) 2024 Arnaud Minier <arnaud.minier@telecom-paris.fr> >> + * Copyright (c) 2024 Inès Varhol <ines.varhol@telecom-paris.fr> > > You can keep 2023-2024. > >> * >> * SPDX-License-Identifier: GPL-2.0-or-later >> * >> @@ -221,6 +221,8 @@ static void stm32l4x5_soc_realize(DeviceState >> *dev_soc, Error **errp) >> } >> } >> + qdev_pass_gpios(DEVICE(&s->syscfg), dev_soc, NULL); >> + >> /* EXTI device */ >> busdev = SYS_BUS_DEVICE(&s->exti); >> if (!sysbus_realize(busdev, errp)) { >> diff --git a/tests/qtest/stm32l4x5_gpio-test.c >> b/tests/qtest/stm32l4x5_gpio-test.c >> index 0f6bda54d3..495a6fc413 100644 >> --- a/tests/qtest/stm32l4x5_gpio-test.c >> +++ b/tests/qtest/stm32l4x5_gpio-test.c >> @@ -43,6 +43,8 @@ >> #define OTYPER_PUSH_PULL 0 >> #define OTYPER_OPEN_DRAIN 1 >> +#define SYSCFG "/machine/soc" > > Can we have a comment such /* SoC forwards GPIOs to SysCfg */? > > (Similar comments for stm32l4x5_syscfg-test.c). Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
diff --git a/hw/arm/stm32l4x5_soc.c b/hw/arm/stm32l4x5_soc.c index 40e294f838..c4b45e6956 100644 --- a/hw/arm/stm32l4x5_soc.c +++ b/hw/arm/stm32l4x5_soc.c @@ -1,8 +1,8 @@ /* * STM32L4x5 SoC family * - * Copyright (c) 2023 Arnaud Minier <arnaud.minier@telecom-paris.fr> - * Copyright (c) 2023 Inès Varhol <ines.varhol@telecom-paris.fr> + * Copyright (c) 2024 Arnaud Minier <arnaud.minier@telecom-paris.fr> + * Copyright (c) 2024 Inès Varhol <ines.varhol@telecom-paris.fr> * * SPDX-License-Identifier: GPL-2.0-or-later * @@ -221,6 +221,8 @@ static void stm32l4x5_soc_realize(DeviceState *dev_soc, Error **errp) } } + qdev_pass_gpios(DEVICE(&s->syscfg), dev_soc, NULL); + /* EXTI device */ busdev = SYS_BUS_DEVICE(&s->exti); if (!sysbus_realize(busdev, errp)) { diff --git a/tests/qtest/stm32l4x5_gpio-test.c b/tests/qtest/stm32l4x5_gpio-test.c index 0f6bda54d3..495a6fc413 100644 --- a/tests/qtest/stm32l4x5_gpio-test.c +++ b/tests/qtest/stm32l4x5_gpio-test.c @@ -43,6 +43,8 @@ #define OTYPER_PUSH_PULL 0 #define OTYPER_OPEN_DRAIN 1 +#define SYSCFG "/machine/soc" + const uint32_t moder_reset[NUM_GPIOS] = { 0xABFFFFFF, 0xFFFFFEBF, @@ -284,7 +286,7 @@ static void test_gpio_output_mode(const void *data) uint32_t gpio = test_gpio_addr(data); unsigned int gpio_id = get_gpio_id(gpio); - qtest_irq_intercept_in(global_qtest, "/machine/soc/syscfg"); + qtest_irq_intercept_in(global_qtest, SYSCFG); /* Set a bit in ODR and check nothing happens */ gpio_set_bit(gpio, ODR, pin, 1); @@ -319,7 +321,7 @@ static void test_gpio_input_mode(const void *data) uint32_t gpio = test_gpio_addr(data); unsigned int gpio_id = get_gpio_id(gpio); - qtest_irq_intercept_in(global_qtest, "/machine/soc/syscfg"); + qtest_irq_intercept_in(global_qtest, SYSCFG); /* Configure a line as input, raise it, and check that the pin is high */ gpio_set_2bits(gpio, MODER, pin, MODER_INPUT); @@ -348,7 +350,7 @@ static void test_pull_up_pull_down(const void *data) uint32_t gpio = test_gpio_addr(data); unsigned int gpio_id = get_gpio_id(gpio); - qtest_irq_intercept_in(global_qtest, "/machine/soc/syscfg"); + qtest_irq_intercept_in(global_qtest, SYSCFG); /* Configure a line as input with pull-up, check the line is set high */ gpio_set_2bits(gpio, MODER, pin, MODER_INPUT); @@ -378,7 +380,7 @@ static void test_push_pull(const void *data) uint32_t gpio = test_gpio_addr(data); uint32_t gpio2 = GPIO_BASE_ADDR + (GPIO_H - gpio); - qtest_irq_intercept_in(global_qtest, "/machine/soc/syscfg"); + qtest_irq_intercept_in(global_qtest, SYSCFG); /* Setting a line high externally, configuring it in push-pull output */ /* And checking the pin was disconnected */ @@ -425,7 +427,7 @@ static void test_open_drain(const void *data) uint32_t gpio = test_gpio_addr(data); uint32_t gpio2 = GPIO_BASE_ADDR + (GPIO_H - gpio); - qtest_irq_intercept_in(global_qtest, "/machine/soc/syscfg"); + qtest_irq_intercept_in(global_qtest, SYSCFG); /* Setting a line high externally, configuring it in open-drain output */ /* And checking the pin was disconnected */ diff --git a/tests/qtest/stm32l4x5_syscfg-test.c b/tests/qtest/stm32l4x5_syscfg-test.c index ed4801798d..eed9d5940b 100644 --- a/tests/qtest/stm32l4x5_syscfg-test.c +++ b/tests/qtest/stm32l4x5_syscfg-test.c @@ -1,8 +1,8 @@ /* * QTest testcase for STM32L4x5_SYSCFG * - * Copyright (c) 2023 Arnaud Minier <arnaud.minier@telecom-paris.fr> - * Copyright (c) 2023 Inès Varhol <ines.varhol@telecom-paris.fr> + * Copyright (c) 2024 Arnaud Minier <arnaud.minier@telecom-paris.fr> + * Copyright (c) 2024 Inès Varhol <ines.varhol@telecom-paris.fr> * * This work is licensed under the terms of the GNU GPL, version 2 or later. * See the COPYING file in the top-level directory. @@ -25,6 +25,9 @@ #define SYSCFG_SWPR2 0x28 #define INVALID_ADDR 0x2C +#define EXTI "/machine/soc/exti" +#define SYSCFG "/machine/soc" + static void syscfg_writel(unsigned int offset, uint32_t value) { writel(SYSCFG_BASE_ADDR + offset, value); @@ -37,8 +40,7 @@ static uint32_t syscfg_readl(unsigned int offset) static void syscfg_set_irq(int num, int level) { - qtest_set_irq_in(global_qtest, "/machine/soc/syscfg", - NULL, num, level); + qtest_set_irq_in(global_qtest, SYSCFG, NULL, num, level); } static void system_reset(void) @@ -197,7 +199,7 @@ static void test_interrupt(void) * Test that GPIO rising lines result in an irq * with the right configuration */ - qtest_irq_intercept_in(global_qtest, "/machine/soc/exti"); + qtest_irq_intercept_in(global_qtest, EXTI); /* GPIOA is the default source for EXTI lines 0 to 15 */ @@ -230,7 +232,7 @@ static void test_irq_pin_multiplexer(void) * Test that syscfg irq sets the right exti irq */ - qtest_irq_intercept_in(global_qtest, "/machine/soc/exti"); + qtest_irq_intercept_in(global_qtest, EXTI); syscfg_set_irq(0, 1); @@ -257,7 +259,7 @@ static void test_irq_gpio_multiplexer(void) * Test that an irq is generated only by the right GPIO */ - qtest_irq_intercept_in(global_qtest, "/machine/soc/exti"); + qtest_irq_intercept_in(global_qtest, EXTI); /* GPIOA is the default source for EXTI lines 0 to 15 */