Message ID | 20240320024010.1659193-4-gaosong@loongson.cn |
---|---|
State | New |
Headers | show |
Series | [PULL,1/3] hw/intc/loongarch_extioi: Fix interrupt routing update | expand |
20.03.2024 05:40, Song Gao : > On gen_ll, if a->imm is zero, make_address_x return src1, > but the load to destination may clobber src1. We use a new > destination to fix this problem. > > Fixes: c5af6628f4be (target/loongarch: Extract make_address_i() helper) > Reviewed-by: Richard Henderson <richard.henderson@linaro.org> > Suggested-by: Richard Henderson <richard.henderson@linaro.org> > Signed-off-by: Song Gao <gaosong@loongson.cn> > Message-Id: <20240320013955.1561311-1-gaosong@loongson.cn> Is it a stable-8.2 material? Thanks, /mjt
在 2024/3/22 上午1:13, Michael Tokarev 写道: > 20.03.2024 05:40, Song Gao : >> On gen_ll, if a->imm is zero, make_address_x return src1, >> but the load to destination may clobber src1. We use a new >> destination to fix this problem. >> >> Fixes: c5af6628f4be (target/loongarch: Extract make_address_i() helper) >> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> >> Suggested-by: Richard Henderson <richard.henderson@linaro.org> >> Signed-off-by: Song Gao <gaosong@loongson.cn> >> Message-Id: <20240320013955.1561311-1-gaosong@loongson.cn> > > Is it a stable-8.2 material? > Yes. Thanks. Song Gao > Thanks, > > /mjt
diff --git a/target/loongarch/tcg/insn_trans/trans_atomic.c.inc b/target/loongarch/tcg/insn_trans/trans_atomic.c.inc index 80c2e286fd..974bc2a70f 100644 --- a/target/loongarch/tcg/insn_trans/trans_atomic.c.inc +++ b/target/loongarch/tcg/insn_trans/trans_atomic.c.inc @@ -5,14 +5,14 @@ static bool gen_ll(DisasContext *ctx, arg_rr_i *a, MemOp mop) { - TCGv dest = gpr_dst(ctx, a->rd, EXT_NONE); + TCGv t1 = tcg_temp_new(); TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE); TCGv t0 = make_address_i(ctx, src1, a->imm); - tcg_gen_qemu_ld_i64(dest, t0, ctx->mem_idx, mop); + tcg_gen_qemu_ld_i64(t1, t0, ctx->mem_idx, mop); tcg_gen_st_tl(t0, tcg_env, offsetof(CPULoongArchState, lladdr)); - tcg_gen_st_tl(dest, tcg_env, offsetof(CPULoongArchState, llval)); - gen_set_gpr(a->rd, dest, EXT_NONE); + tcg_gen_st_tl(t1, tcg_env, offsetof(CPULoongArchState, llval)); + gen_set_gpr(a->rd, t1, EXT_NONE); return true; }