| Message ID | 20240314113510.477862-3-hchauhan@ventanamicro.com |
|---|---|
| State | New |
| Headers | show |
| Series | Introduce sdtrig ISA extension | expand |
On Thu, Mar 14, 2024 at 05:05:09PM +0530, Himanshu Chauhan wrote: > This patch adds "sdtrig" in the ISA string when sdtrig extension is enabled. > The sdtrig extension may or may not be implemented in a system. Therefore, the > -cpu rv64,sdtrig=<true/false> > option can be used to dynamically turn sdtrig extension on or off. > > Since, the sdtrig ISA extension is a superset of debug specification, disable > the debug property when sdtrig is enabled. A warning is printed when this is > done. > > By default, the sdtrig extension is disabled and debug property enabled as usual. > > Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com> > --- > target/riscv/cpu.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index 2602aae9f5..66c91fffd6 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -175,6 +175,7 @@ const RISCVIsaExtData isa_edata_arr[] = { > ISA_EXT_DATA_ENTRY(zvkt, PRIV_VERSION_1_12_0, ext_zvkt), > ISA_EXT_DATA_ENTRY(zhinx, PRIV_VERSION_1_12_0, ext_zhinx), > ISA_EXT_DATA_ENTRY(zhinxmin, PRIV_VERSION_1_12_0, ext_zhinxmin), > + ISA_EXT_DATA_ENTRY(sdtrig, PRIV_VERSION_1_12_0, ext_sdtrig), sdtrig isn't in 1.12, is it? I think it's 1.13. Hmm, I wonder if we don't need to audit all our recently added extensions to make sure they're actually 1.12, since we don't have PRIV_VERSION_1_13_0 defined... > ISA_EXT_DATA_ENTRY(smaia, PRIV_VERSION_1_12_0, ext_smaia), > ISA_EXT_DATA_ENTRY(smepmp, PRIV_VERSION_1_12_0, ext_smepmp), > ISA_EXT_DATA_ENTRY(smstateen, PRIV_VERSION_1_12_0, ext_smstateen), > @@ -1008,6 +1009,11 @@ static void riscv_cpu_reset_hold(Object *obj) > set_default_nan_mode(1, &env->fp_status); > > #ifndef CONFIG_USER_ONLY > + if (!cpu->cfg.debug && cpu->cfg.ext_sdtrig) { > + warn_report("Enabling 'debug' since 'sdtrig' is enabled."); > + cpu->cfg.debug = true; > + } > + > if (cpu->cfg.debug || cpu->cfg.ext_sdtrig) { > riscv_trigger_reset_hold(env); > } > @@ -1480,6 +1486,7 @@ const RISCVCPUMultiExtConfig riscv_cpu_extensions[] = { > MULTI_EXT_CFG_BOOL("zvfhmin", ext_zvfhmin, false), > MULTI_EXT_CFG_BOOL("sstc", ext_sstc, true), > > + MULTI_EXT_CFG_BOOL("sdtrig", ext_sdtrig, false), > MULTI_EXT_CFG_BOOL("smaia", ext_smaia, false), > MULTI_EXT_CFG_BOOL("smepmp", ext_smepmp, false), > MULTI_EXT_CFG_BOOL("smstateen", ext_smstateen, false), > -- > 2.34.1 > Thanks, drew
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 2602aae9f5..66c91fffd6 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -175,6 +175,7 @@ const RISCVIsaExtData isa_edata_arr[] = { ISA_EXT_DATA_ENTRY(zvkt, PRIV_VERSION_1_12_0, ext_zvkt), ISA_EXT_DATA_ENTRY(zhinx, PRIV_VERSION_1_12_0, ext_zhinx), ISA_EXT_DATA_ENTRY(zhinxmin, PRIV_VERSION_1_12_0, ext_zhinxmin), + ISA_EXT_DATA_ENTRY(sdtrig, PRIV_VERSION_1_12_0, ext_sdtrig), ISA_EXT_DATA_ENTRY(smaia, PRIV_VERSION_1_12_0, ext_smaia), ISA_EXT_DATA_ENTRY(smepmp, PRIV_VERSION_1_12_0, ext_smepmp), ISA_EXT_DATA_ENTRY(smstateen, PRIV_VERSION_1_12_0, ext_smstateen), @@ -1008,6 +1009,11 @@ static void riscv_cpu_reset_hold(Object *obj) set_default_nan_mode(1, &env->fp_status); #ifndef CONFIG_USER_ONLY + if (!cpu->cfg.debug && cpu->cfg.ext_sdtrig) { + warn_report("Enabling 'debug' since 'sdtrig' is enabled."); + cpu->cfg.debug = true; + } + if (cpu->cfg.debug || cpu->cfg.ext_sdtrig) { riscv_trigger_reset_hold(env); } @@ -1480,6 +1486,7 @@ const RISCVCPUMultiExtConfig riscv_cpu_extensions[] = { MULTI_EXT_CFG_BOOL("zvfhmin", ext_zvfhmin, false), MULTI_EXT_CFG_BOOL("sstc", ext_sstc, true), + MULTI_EXT_CFG_BOOL("sdtrig", ext_sdtrig, false), MULTI_EXT_CFG_BOOL("smaia", ext_smaia, false), MULTI_EXT_CFG_BOOL("smepmp", ext_smepmp, false), MULTI_EXT_CFG_BOOL("smstateen", ext_smstateen, false),
This patch adds "sdtrig" in the ISA string when sdtrig extension is enabled. The sdtrig extension may or may not be implemented in a system. Therefore, the -cpu rv64,sdtrig=<true/false> option can be used to dynamically turn sdtrig extension on or off. Since, the sdtrig ISA extension is a superset of debug specification, disable the debug property when sdtrig is enabled. A warning is printed when this is done. By default, the sdtrig extension is disabled and debug property enabled as usual. Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com> --- target/riscv/cpu.c | 7 +++++++ 1 file changed, 7 insertions(+)