diff mbox series

[v6,11/17] hw/loongarch: fdt adds Extend I/O Interrupt Controller

Message ID 20240307164835.300412-12-gaosong@loongson.cn
State New
Headers show
Series Add boot LoongArch elf kernel with FDT | expand

Commit Message

Song Gao March 7, 2024, 4:48 p.m. UTC
fdt adds Extend I/O Interrupt Controller,
we use 'loongson,ls2k2000-eiointc'.

See:
https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongson-eiointc.c
https://lore.kernel.org/r/764e02d924094580ac0f1d15535f4b98308705c6.1683279769.git.zhoubinbin@loongson.cn

Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240301093839.663947-12-gaosong@loongson.cn>
---
 hw/loongarch/virt.c                | 30 +++++++++++++++++++++++++++++-
 include/hw/intc/loongarch_extioi.h |  1 +
 2 files changed, 30 insertions(+), 1 deletion(-)

Comments

maobibo March 8, 2024, 8:40 a.m. UTC | #1
On 2024/3/8 上午12:48, Song Gao wrote:
> fdt adds Extend I/O Interrupt Controller,
> we use 'loongson,ls2k2000-eiointc'.
> 
> See:
> https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongson-eiointc.c
> https://lore.kernel.org/r/764e02d924094580ac0f1d15535f4b98308705c6.1683279769.git.zhoubinbin@loongson.cn
> 
> Signed-off-by: Song Gao <gaosong@loongson.cn>
> Message-Id: <20240301093839.663947-12-gaosong@loongson.cn>
> ---
>   hw/loongarch/virt.c                | 30 +++++++++++++++++++++++++++++-
>   include/hw/intc/loongarch_extioi.h |  1 +
>   2 files changed, 30 insertions(+), 1 deletion(-)
> 
> diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
> index d260f933a5..822f070c45 100644
> --- a/hw/loongarch/virt.c
> +++ b/hw/loongarch/virt.c
> @@ -123,6 +123,31 @@ static void fdt_add_cpuic_node(LoongArchMachineState *lams,
>       g_free(nodename);
>   }
>   
> +static void fdt_add_eiointc_node(LoongArchMachineState *lams,
> +                                  uint32_t *cpuintc_phandle,
> +                                  uint32_t *eiointc_phandle)
> +{
> +    MachineState *ms = MACHINE(lams);
> +    char *nodename;
> +    hwaddr extioi_base = APIC_BASE;
> +    hwaddr extioi_size = EXTIOI_SIZE;
> +
> +    *eiointc_phandle = qemu_fdt_alloc_phandle(ms->fdt);
> +    nodename = g_strdup_printf("/eiointc@%" PRIx64, extioi_base);
> +    qemu_fdt_add_subnode(ms->fdt, nodename);
> +    qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", *eiointc_phandle);
> +    qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
> +                            "loongson,ls2k2000-eiointc");
> +    qemu_fdt_setprop(ms->fdt, nodename, "interrupt-controller", NULL, 0);
> +    qemu_fdt_setprop_cell(ms->fdt, nodename, "#interrupt-cells", 1);
> +    qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupt-parent",
> +                          *cpuintc_phandle);
> +    qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupts", 3);
> +    qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", 0x0,
> +                           extioi_base, 0x0, extioi_size);
> +    g_free(nodename);
> +}
> +
>   static void fdt_add_flash_node(LoongArchMachineState *lams)
>   {
>       MachineState *ms = MACHINE(lams);
> @@ -544,7 +569,7 @@ static void loongarch_irq_init(LoongArchMachineState *lams)
>       CPULoongArchState *env;
>       CPUState *cpu_state;
>       int cpu, pin, i, start, num;
> -    uint32_t cpuintc_phandle;
> +    uint32_t cpuintc_phandle, eiointc_phandle;
>   
>       /*
>        * The connection of interrupts:
> @@ -613,6 +638,9 @@ static void loongarch_irq_init(LoongArchMachineState *lams)
>           }
>       }
>   
> +    /* Add Extend I/O Interrupt Controller node */
> +    fdt_add_eiointc_node(lams, &cpuintc_phandle, &eiointc_phandle);
> +
>       pch_pic = qdev_new(TYPE_LOONGARCH_PCH_PIC);
>       num = VIRT_PCH_PIC_IRQ_NUM;
>       qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num);
> diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h
> index a0a46b888c..410c6e1121 100644
> --- a/include/hw/intc/loongarch_extioi.h
> +++ b/include/hw/intc/loongarch_extioi.h
> @@ -39,6 +39,7 @@
>   #define EXTIOI_COREISR_END           (0xB20 - APIC_OFFSET)
>   #define EXTIOI_COREMAP_START         (0xC00 - APIC_OFFSET)
>   #define EXTIOI_COREMAP_END           (0xD00 - APIC_OFFSET)
> +#define EXTIOI_SIZE                  0x800
>   
>   typedef struct ExtIOICore {
>       uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT];
> 
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
diff mbox series

Patch

diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index d260f933a5..822f070c45 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -123,6 +123,31 @@  static void fdt_add_cpuic_node(LoongArchMachineState *lams,
     g_free(nodename);
 }
 
+static void fdt_add_eiointc_node(LoongArchMachineState *lams,
+                                  uint32_t *cpuintc_phandle,
+                                  uint32_t *eiointc_phandle)
+{
+    MachineState *ms = MACHINE(lams);
+    char *nodename;
+    hwaddr extioi_base = APIC_BASE;
+    hwaddr extioi_size = EXTIOI_SIZE;
+
+    *eiointc_phandle = qemu_fdt_alloc_phandle(ms->fdt);
+    nodename = g_strdup_printf("/eiointc@%" PRIx64, extioi_base);
+    qemu_fdt_add_subnode(ms->fdt, nodename);
+    qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", *eiointc_phandle);
+    qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
+                            "loongson,ls2k2000-eiointc");
+    qemu_fdt_setprop(ms->fdt, nodename, "interrupt-controller", NULL, 0);
+    qemu_fdt_setprop_cell(ms->fdt, nodename, "#interrupt-cells", 1);
+    qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupt-parent",
+                          *cpuintc_phandle);
+    qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupts", 3);
+    qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", 0x0,
+                           extioi_base, 0x0, extioi_size);
+    g_free(nodename);
+}
+
 static void fdt_add_flash_node(LoongArchMachineState *lams)
 {
     MachineState *ms = MACHINE(lams);
@@ -544,7 +569,7 @@  static void loongarch_irq_init(LoongArchMachineState *lams)
     CPULoongArchState *env;
     CPUState *cpu_state;
     int cpu, pin, i, start, num;
-    uint32_t cpuintc_phandle;
+    uint32_t cpuintc_phandle, eiointc_phandle;
 
     /*
      * The connection of interrupts:
@@ -613,6 +638,9 @@  static void loongarch_irq_init(LoongArchMachineState *lams)
         }
     }
 
+    /* Add Extend I/O Interrupt Controller node */
+    fdt_add_eiointc_node(lams, &cpuintc_phandle, &eiointc_phandle);
+
     pch_pic = qdev_new(TYPE_LOONGARCH_PCH_PIC);
     num = VIRT_PCH_PIC_IRQ_NUM;
     qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num);
diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h
index a0a46b888c..410c6e1121 100644
--- a/include/hw/intc/loongarch_extioi.h
+++ b/include/hw/intc/loongarch_extioi.h
@@ -39,6 +39,7 @@ 
 #define EXTIOI_COREISR_END           (0xB20 - APIC_OFFSET)
 #define EXTIOI_COREMAP_START         (0xC00 - APIC_OFFSET)
 #define EXTIOI_COREMAP_END           (0xD00 - APIC_OFFSET)
+#define EXTIOI_SIZE                  0x800
 
 typedef struct ExtIOICore {
     uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT];