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[2/8] target/arm: Timer _EL02 registers UNDEF for E2H == 0

Message ID 20240301183219.2424889-3-peter.maydell@linaro.org
State New
Headers show
Series target/arm: Implement FEAT_ECV (Enhanced Counter Virtualization) | expand

Commit Message

Peter Maydell March 1, 2024, 6:32 p.m. UTC 
The timer _EL02 registers should UNDEF for invalid accesses from EL2
or EL3 when HCR_EL2.E2H == 0, not take a cp access trap.  We were
delivering the exception to EL2 with the wrong syndrome.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/helper.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Richard Henderson March 1, 2024, 9:08 p.m. UTC | #1 
On 3/1/24 08:32, Peter Maydell wrote:
> The timer _EL02 registers should UNDEF for invalid accesses from EL2
> or EL3 when HCR_EL2.E2H == 0, not take a cp access trap.  We were
> delivering the exception to EL2 with the wrong syndrome.
> 
> Signed-off-by: Peter Maydell<peter.maydell@linaro.org>
> ---
>   target/arm/helper.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~
diff mbox series

Patch

diff --git a/target/arm/helper.c b/target/arm/helper.c
index 90c4fb72ce4..978df6f2823 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6551,7 +6551,7 @@  static CPAccessResult e2h_access(CPUARMState *env, const ARMCPRegInfo *ri,
         return CP_ACCESS_OK;
     }
     if (!(arm_hcr_el2_eff(env) & HCR_E2H)) {
-        return CP_ACCESS_TRAP;
+        return CP_ACCESS_TRAP_UNCATEGORIZED;
     }
     return CP_ACCESS_OK;
 }