@@ -321,7 +321,6 @@ static void do_command_phase(ESPState *s)
fifo8_reset(&s->cmdfifo);
s->data_ready = false;
if (datalen != 0) {
- s->ti_cmd = 0;
/*
* Switch to DATA phase but wait until initial data xfer is
* complete before raising the command completion interrupt
@@ -908,12 +907,12 @@ void esp_transfer_data(SCSIRequest *req, uint32_t len)
* async data transfer is delayed then s->dma is set incorrectly.
*/
- if (s->ti_cmd == (CMD_TI | CMD_DMA)) {
+ if (s->rregs[ESP_CMD] == (CMD_TI | CMD_DMA)) {
/* When the SCSI layer returns more data, raise deferred INTR_BS */
esp_dma_ti_check(s);
esp_do_dma(s);
- } else if (s->ti_cmd == CMD_TI) {
+ } else if (s->rregs[ESP_CMD] == CMD_TI) {
esp_do_nodma(s);
}
}
@@ -927,7 +926,6 @@ static void handle_ti(ESPState *s)
return;
}
- s->ti_cmd = s->rregs[ESP_CMD];
if (s->dma) {
dmalen = esp_get_tc(s);
trace_esp_handle_ti(dmalen);
@@ -1200,6 +1198,14 @@ static bool esp_is_version_6(void *opaque, int version_id)
return version_id >= 6;
}
+static bool esp_is_between_version_5_and_6(void *opaque, int version_id)
+{
+ ESPState *s = ESP(opaque);
+
+ version_id = MIN(version_id, s->mig_version_id);
+ return version_id >= 5 && version_id <= 6;
+}
+
int esp_pre_save(void *opaque)
{
ESPState *s = ESP(object_resolve_path_component(
@@ -1237,7 +1243,7 @@ static int esp_post_load(void *opaque, int version_id)
const VMStateDescription vmstate_esp = {
.name = "esp",
- .version_id = 6,
+ .version_id = 7,
.minimum_version_id = 3,
.post_load = esp_post_load,
.fields = (const VMStateField[]) {
@@ -1265,7 +1271,8 @@ const VMStateDescription vmstate_esp = {
VMSTATE_UINT8_TEST(cmdfifo_cdb_offset, ESPState, esp_is_version_5),
VMSTATE_FIFO8_TEST(fifo, ESPState, esp_is_version_5),
VMSTATE_FIFO8_TEST(cmdfifo, ESPState, esp_is_version_5),
- VMSTATE_UINT8_TEST(ti_cmd, ESPState, esp_is_version_5),
+ VMSTATE_UINT8_TEST(mig_ti_cmd, ESPState,
+ esp_is_between_version_5_and_6),
VMSTATE_UINT8_TEST(lun, ESPState, esp_is_version_6),
VMSTATE_END_OF_LIST()
},
@@ -41,7 +41,6 @@ struct ESPState {
uint32_t do_cmd;
bool data_ready;
- uint8_t ti_cmd;
int dma_enabled;
uint32_t async_len;
@@ -62,6 +61,8 @@ struct ESPState {
uint8_t mig_ti_buf[ESP_FIFO_SZ];
uint8_t mig_cmdbuf[ESP_CMDFIFO_SZ];
uint32_t mig_cmdlen;
+
+ uint8_t mig_ti_cmd;
};
#define TYPE_SYSBUS_ESP "sysbus-esp"