@@ -852,7 +852,7 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f, int flags)
csr_ops[csrno].name, val);
}
}
- uint16_t vlenb = cpu->cfg.vlen >> 3;
+ uint16_t vlenb = cpu->cfg.vlenb;
for (i = 0; i < 32; i++) {
qemu_fprintf(f, " %-8s ", riscv_rvv_regnames[i]);
@@ -1320,6 +1320,7 @@ static void riscv_cpu_init(Object *obj)
/* Default values for non-bool cpu properties */
cpu->cfg.pmu_mask = MAKE_64BIT_MASK(3, 16);
cpu->cfg.vlen = 128;
+ cpu->cfg.vlenb = 128 >> 3;
cpu->cfg.elen = 64;
cpu->cfg.cbom_blocksize = 64;
cpu->cfg.cbop_blocksize = 64;
@@ -1819,6 +1820,7 @@ static void prop_vlen_set(Object *obj, Visitor *v, const char *name,
cpu_option_add_user_setting(name, value);
cpu->cfg.vlen = value;
+ cpu->cfg.vlenb = value >> 3;
}
static void prop_vlen_get(Object *obj, Visitor *v, const char *name,
@@ -140,6 +140,7 @@ struct RISCVCPUConfig {
uint32_t pmu_mask;
uint16_t vlen;
+ uint16_t vlenb;
uint16_t elen;
uint16_t cbom_blocksize;
uint16_t cbop_blocksize;