From patchwork Wed Jan 3 15:53:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Tardieu X-Patchwork-Id: 1881990 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4T4vS31QKgz23dW for ; Thu, 4 Jan 2024 02:54:59 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rL3Z8-0004MR-D8; Wed, 03 Jan 2024 10:53:58 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rL3Z5-0004Kf-Ry; Wed, 03 Jan 2024 10:53:55 -0500 Received: from zoidberg.rfc1149.net ([195.154.227.159]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rL3Z2-00052E-LO; Wed, 03 Jan 2024 10:53:55 -0500 Received: from buffy.. (buffy [192.168.147.6]) by zoidberg.rfc1149.net (Postfix) with ESMTP id A063080027; Wed, 3 Jan 2024 16:53:43 +0100 (CET) Authentication-Results: zoidberg.rfc1149.net; dmarc=fail (p=none dis=none) header.from=rfc1149.net Authentication-Results: zoidberg.rfc1149.net; spf=fail smtp.mailfrom=rfc1149.net From: Samuel Tardieu To: qemu-devel@nongnu.org Cc: Arnaud Minier , qemu-arm@nongnu.org, Anton Kochkov , Alistair Francis , Peter Maydell , =?utf-8?q?In=C3=A8s_Varhol?= , Alexandre Iooss , Samuel Tardieu Subject: [PATCH v2 2/3] hw/arm/armv7m: alias the NVIC "num-prio-bits" property Date: Wed, 3 Jan 2024 16:53:36 +0100 Message-ID: <20240103155337.2026946-3-sam@rfc1149.net> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20240103155337.2026946-1-sam@rfc1149.net> References: <20240103155337.2026946-1-sam@rfc1149.net> MIME-Version: 1.0 Received-SPF: pass client-ip=195.154.227.159; envelope-from=sam@rfc1149.net; helo=zoidberg.rfc1149.net X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org A SoC will not have a direct access to the NVIC embedded in its ARM core. By aliasing the "num-prio-bits" property similarly to what is done for the "num-irq" one, a SoC can easily configure it on its armv7m instance. Signed-off-by: Samuel Tardieu Reviewed-by: Peter Maydell --- hw/arm/armv7m.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c index d10abb36a8..4fda2d1d47 100644 --- a/hw/arm/armv7m.c +++ b/hw/arm/armv7m.c @@ -256,6 +256,8 @@ static void armv7m_instance_init(Object *obj) object_initialize_child(obj, "nvic", &s->nvic, TYPE_NVIC); object_property_add_alias(obj, "num-irq", OBJECT(&s->nvic), "num-irq"); + object_property_add_alias(obj, "num-prio-bits", + OBJECT(&s->nvic), "num-prio-bits"); object_initialize_child(obj, "systick-reg-ns", &s->systick[M_REG_NS], TYPE_SYSTICK);