@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
+#include "exec/memory.h"
#include "mcdstub/arm_mcdstub.h"
int arm_mcd_store_mem_spaces(CPUState *cpu, GArray *memspaces)
@@ -259,3 +260,30 @@ uint16_t arm_mcd_get_opcode(CPUState *cs, uint32_t n)
/* TODO: not working with current build structure */
return 0;
}
+
+AddressSpace *arm_mcd_get_address_space(uint32_t cpu_id,
+ mcd_mem_space_st mem_space)
+{
+ /* get correct address space name */
+ char as_name[ARGUMENT_STRING_LENGTH] = {0};
+ if (mem_space.is_secure) {
+ sprintf(as_name, "cpu-secure-memory-%u", cpu_id);
+ } else {
+ sprintf(as_name, "cpu-memory-%u", cpu_id);
+ }
+ /* return correct address space */
+ AddressSpace *as = mcd_find_address_space(as_name);
+ return as;
+}
+
+MemTxAttrs arm_mcd_get_memtxattrs(mcd_mem_space_st mem_space)
+{
+ MemTxAttrs attributes = {0};
+ if (mem_space.is_secure) {
+ attributes.secure = 1;
+ attributes.space = 2;
+ } else {
+ attributes.space = 1;
+ }
+ return attributes;
+}
@@ -997,6 +997,186 @@ static void handle_write_register(GArray *params, void *user_ctx)
}
}
+/**
+ * mcd_read_write_physical_memory() - Reades or writes from/to a logical
+ * memory address.
+ * @address_space: Desired QEMU address space (e.g. secure/non-secure)
+ * @attributes: Access attributes
+ * @addr: (physical) memory address
+ * @buf: Buffer for memory data
+ * @len: Length of the memory access
+ * @is_write: True for writing and false for reading
+ */
+static int mcd_read_write_physical_memory(AddressSpace *address_space,
+ MemTxAttrs attributes, hwaddr addr, uint8_t *buf, int len, bool is_write)
+{
+ if (is_write) {
+ return address_space_write_rom(address_space, addr, attributes, buf,
+ len);
+ } else {
+ return address_space_read_full(address_space, addr, attributes, buf,
+ len);
+ }
+}
+
+/**
+ * mcd_read_write_memory() - Reades or writes from/to a logical memory address.
+ * @cpu: CPUState
+ * @address_space: Desired QEMU address space (e.g. secure/non-secure)
+ * @attributes: Access attributes
+ * @addr: (logical) memory address
+ * @buf: Buffer for memory data
+ * @len: Length of the memory access
+ * @is_write: True for writing and false for reading
+ */
+static int mcd_read_write_memory(CPUState *cpu, AddressSpace *address_space,
+ MemTxAttrs attributes, vaddr addr, uint8_t *buf, uint64_t len,
+ bool is_write)
+{
+ /* get physical address */
+ if (cpu_memory_get_physical_address(cpu, &addr, &len) != 0) {
+ return -1;
+ }
+ /* read memory */
+ return mcd_read_write_physical_memory(address_space, attributes, addr, buf,
+ len, is_write);
+}
+
+/**
+ * mcd_get_address_space() - Returnes the correct QEMU address space name
+ * @cpu: CPUState
+ * @cpu_id: Correct CPU ID
+ * @mem_space: Desired mcd specific memory space.
+ */
+static AddressSpace *mcd_get_address_space(CPUState *cpu, uint32_t cpu_id,
+ mcd_mem_space_st mem_space)
+{
+ CPUClass *cc = CPU_GET_CLASS(cpu);
+ const gchar *arch = cc->gdb_arch_name(cpu);
+ if (strcmp(arch, MCDSTUB_ARCH_ARM) == 0) {
+ return arm_mcd_get_address_space(cpu_id, mem_space);
+ } else {
+ g_assert_not_reached();
+ }
+}
+
+/**
+ * mcd_get_memtxattrs() - Returnes the correct QEMU address space access
+ * attributes
+ * @cpu: CPUState
+ * @mem_space: Desired mcd specific memory space.
+ */
+static MemTxAttrs mcd_get_memtxattrs(CPUState *cpu, mcd_mem_space_st mem_space)
+{
+ CPUClass *cc = CPU_GET_CLASS(cpu);
+ const gchar *arch = cc->gdb_arch_name(cpu);
+ if (strcmp(arch, MCDSTUB_ARCH_ARM) == 0) {
+ return arm_mcd_get_memtxattrs(mem_space);
+ } else {
+ g_assert_not_reached();
+ }
+}
+
+/**
+ * handle_read_memory() - Handler for reading memory.
+ *
+ * First, this function checks whether reading a secure memory space is
+ * requested and changes the access mode with :c:func:`arm_mcd_set_scr`.
+ * Then it calls :c:func:`mcd_read_memory` to read memory. The collected
+ * data gets stored in the mem_buf byte array. The data then gets converted
+ * into a hex string with :c:func:`mcd_memtohex` and then send.
+ * @params: GArray with all TCP packet parameters.
+ */
+static void handle_read_memory(GArray *params, void *user_ctx)
+{
+ /* read input parameters */
+ uint32_t cpu_id = get_param(params, 0)->cpu_id;
+ uint32_t mem_space_id = get_param(params, 1)->data_uint32_t;
+ uint64_t mem_address = get_param(params, 2)->data_uint64_t;
+ uint32_t len = get_param(params, 3)->data_uint32_t;
+ /* check which memory space was requested */
+ CPUState *cpu = mcd_get_cpu(cpu_id);
+ GArray *memspaces =
+ g_list_nth_data(mcdserver_state.all_memspaces, cpu_id);
+ mcd_mem_space_st space = g_array_index(memspaces, mcd_mem_space_st,
+ mem_space_id - 1);
+ /* get data in the QEMU address space and access attributes */
+ AddressSpace *address_space = mcd_get_address_space(cpu, cpu_id, space);
+ MemTxAttrs attributes = mcd_get_memtxattrs(cpu, space);
+ /* read memory data */
+ g_byte_array_set_size(mcdserver_state.mem_buf, len);
+ if (space.is_physical) {
+ /* physical memory */
+ if (mcd_read_write_physical_memory(address_space, attributes,
+ mem_address, mcdserver_state.mem_buf->data,
+ mcdserver_state.mem_buf->len, false) != 0) {
+ mcd_put_packet(TCP_EXECUTION_ERROR);
+ return;
+ }
+ } else {
+ /* user space memory */
+ if (mcd_read_write_memory(cpu, address_space, attributes, mem_address,
+ mcdserver_state.mem_buf->data, mcdserver_state.mem_buf->len,
+ false) != 0) {
+ mcd_put_packet(TCP_EXECUTION_ERROR);
+ return;
+ }
+ }
+ /* send data */
+ mcd_memtohex(mcdserver_state.str_buf, mcdserver_state.mem_buf->data,
+ mcdserver_state.mem_buf->len);
+ mcd_put_strbuf();
+}
+
+/**
+ * handle_write_memory() - Handler for writing memory.
+ *
+ * First, this function checks whether reading a secure memory space is
+ * requested and changes the access mode with :c:func:`arm_mcd_set_scr`.
+ * Then it converts the incoming hex string data into a byte array with
+ * :c:func:`mcd_hextomem`. Then it calls :c:func:`mcd_write_memory` to write to
+ * the register.
+ * @params: GArray with all TCP packet parameters.
+ */
+static void handle_write_memory(GArray *params, void *user_ctx)
+{
+ /* read input parameters */
+ uint32_t cpu_id = get_param(params, 0)->cpu_id;
+ uint32_t mem_space_id = get_param(params, 1)->data_uint32_t;
+ uint64_t mem_address = get_param(params, 2)->data_uint64_t;
+ uint32_t len = get_param(params, 3)->data_uint32_t;
+ /* check which memory space was requested */
+ CPUState *cpu = mcd_get_cpu(cpu_id);
+ GArray *memspaces =
+ g_list_nth_data(mcdserver_state.all_memspaces, cpu_id);
+ mcd_mem_space_st space = g_array_index(memspaces, mcd_mem_space_st,
+ mem_space_id - 1);
+ /* get data in the QEMU address space and access attributes */
+ AddressSpace *address_space = mcd_get_address_space(cpu, cpu_id, space);
+ MemTxAttrs attributes = mcd_get_memtxattrs(cpu, space);
+ /* write memory data */
+ mcd_hextomem(mcdserver_state.mem_buf, mcdserver_state.str_buf->str, len);
+ if (space.is_physical) {
+ /* physical memory */
+ if (mcd_read_write_physical_memory(address_space, attributes,
+ mem_address, mcdserver_state.mem_buf->data,
+ mcdserver_state.mem_buf->len, true) != 0) {
+ mcd_put_packet(TCP_EXECUTION_ERROR);
+ return;
+ }
+ } else {
+ /* user space memory */
+ if (mcd_read_write_memory(cpu, address_space, attributes, mem_address,
+ mcdserver_state.mem_buf->data, mcdserver_state.mem_buf->len,
+ true) != 0) {
+ mcd_put_packet(TCP_EXECUTION_ERROR);
+ return;
+ }
+ }
+ /* send acknowledge */
+ mcd_put_packet(TCP_EXECUTION_SUCCESS);
+}
+
/**
* mcd_handle_packet() - Evaluates the type of received packet and chooses the
* correct handler.
@@ -1128,6 +1308,29 @@ static int mcd_handle_packet(const char *line_buf)
cmd_parser = &write_reg_cmd_desc;
}
break;
+ case TCP_CHAR_READ_MEMORY:
+ {
+ static MCDCmdParseEntry read_mem_cmd_desc = {
+ .handler = handle_read_memory,
+ .cmd = {TCP_CHAR_READ_MEMORY, '\0'},
+ .schema = {ARG_SCHEMA_CORENUM, ARG_SCHEMA_INT,
+ ARG_SCHEMA_UINT64_T, ARG_SCHEMA_INT, '\0'},
+ };
+ cmd_parser = &read_mem_cmd_desc;
+ }
+ break;
+ case TCP_CHAR_WRITE_MEMORY:
+ {
+ static MCDCmdParseEntry write_mem_cmd_desc = {
+ .handler = handle_write_memory,
+ .cmd = {TCP_CHAR_WRITE_MEMORY, '\0'},
+ .schema = {ARG_SCHEMA_CORENUM, ARG_SCHEMA_INT,
+ ARG_SCHEMA_UINT64_T, ARG_SCHEMA_INT,
+ ARG_SCHEMA_HEXDATA, '\0'},
+ };
+ cmd_parser = &write_mem_cmd_desc;
+ }
+ break;
default:
/* command not supported */
mcd_put_packet("");
@@ -100,4 +100,19 @@ int arm_mcd_get_additional_register_info(GArray *reggroups, GArray *registers,
*/
uint16_t arm_mcd_get_opcode(CPUState *cs, uint32_t n);
+/**
+ * arm_mcd_get_address_space() - Returnes the correct QEMU address space name
+ * @cpu_id: Correct CPU ID
+ * @mem_space: Desired mcd specific memory space.
+ */
+AddressSpace *arm_mcd_get_address_space(uint32_t cpu_id,
+ mcd_mem_space_st mem_space);
+
+/**
+ * arm_mcd_get_memtxattrs() - Returnes the correct QEMU address space access
+ * attributes
+ * @mem_space: Desired mcd specific memory space.
+ */
+MemTxAttrs arm_mcd_get_memtxattrs(mcd_mem_space_st mem_space);
+
#endif /* ARM_MCDSTUB_H */