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[92.224.39.156]) by smtp.gmail.com with ESMTPSA id s7-20020a05600c45c700b0040c45071c18sm35134091wmo.39.2023.12.18.10.51.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Dec 2023 10:51:37 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Fabiano Rosas , "Michael S. Tsirkin" , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , qemu-ppc@nongnu.org, Paolo Bonzini , Leonardo Bras , Kevin Wolf , Peter Xu , David Hildenbrand , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Juan Quintela , John Snow , BALATON Zoltan , Jiaxun Yang , Hanna Reitz , qemu-block@nongnu.org, Bernhard Beschow Subject: [PATCH v2 07/12] exec/ioport: Add portio_list_set_enabled() Date: Mon, 18 Dec 2023 19:51:09 +0100 Message-ID: <20231218185114.119736-8-shentey@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231218185114.119736-1-shentey@gmail.com> References: <20231218185114.119736-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=shentey@gmail.com; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Some SuperI/O devices such as the VIA south bridges or the PC87312 controller allow to enable or disable their SuperI/O functions. Add a convenience function for implementing this in the VIA south bridges. The naming of the functions is inspired by its memory_region_set_enabled() pendant. Signed-off-by: Bernhard Beschow --- docs/devel/migration.rst | 1 + include/exec/ioport.h | 1 + system/ioport.c | 9 +++++++++ 3 files changed, 11 insertions(+) diff --git a/docs/devel/migration.rst b/docs/devel/migration.rst index 389fa24bde..466be609a2 100644 --- a/docs/devel/migration.rst +++ b/docs/devel/migration.rst @@ -465,6 +465,7 @@ Examples of such memory API functions are: - memory_region_set_address() - memory_region_set_alias_offset() - portio_list_set_address() + - portio_list_set_enabled() Iterative device migration -------------------------- diff --git a/include/exec/ioport.h b/include/exec/ioport.h index 96858e5ac3..4397f12f93 100644 --- a/include/exec/ioport.h +++ b/include/exec/ioport.h @@ -71,6 +71,7 @@ void portio_list_add(PortioList *piolist, struct MemoryRegion *address_space, uint32_t addr); void portio_list_del(PortioList *piolist); +void portio_list_set_enabled(PortioList *piolist, bool enabled); void portio_list_set_address(PortioList *piolist, uint32_t addr); #endif /* IOPORT_H */ diff --git a/system/ioport.c b/system/ioport.c index 000e0ee1af..fd551d0375 100644 --- a/system/ioport.c +++ b/system/ioport.c @@ -324,6 +324,15 @@ void portio_list_del(PortioList *piolist) } } +void portio_list_set_enabled(PortioList *piolist, bool enabled) +{ + unsigned i; + + for (i = 0; i < piolist->nr; ++i) { + memory_region_set_enabled(piolist->regions[i], enabled); + } +} + void portio_list_set_address(PortioList *piolist, uint32_t addr) { MemoryRegionPortioList *mrpio;