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Thu, 14 Dec 2023 13:15:33 -0800 (PST) Date: Thu, 14 Dec 2023 21:15:18 +0000 In-Reply-To: <20231214211527.1946302-1-nabihestefan@google.com> Mime-Version: 1.0 References: <20231214211527.1946302-1-nabihestefan@google.com> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog Message-ID: <20231214211527.1946302-3-nabihestefan@google.com> Subject: [PATCH v8 02/11] hw/arm: Add PCI mailbox module to Nuvoton SoC From: Nabih Estefan To: peter.maydell@linaro.org Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, kfting@nuvoton.com, wuhaotsh@google.com, jasowang@redhat.com, avi.fishman@nuvoton.com, nabihestefan@google.com, kwliu@nuvoton.com, tomer.maimon@nuvoton.com, Hila.Miranda-Kuzi@nuvoton.com Received-SPF: pass client-ip=2607:f8b0:4864:20::b49; envelope-from=3dXB7ZQwKCnYhUVcbYmnYZUhaiiafY.WigkYgo-XYpYfhihaho.ila@flex--nabihestefan.bounces.google.com; helo=mail-yb1-xb49.google.com X-Spam_score_int: -95 X-Spam_score: -9.6 X-Spam_bar: --------- X-Spam_report: (-9.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01, USER_IN_DEF_DKIM_WL=-7.5 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Hao Wu This patch wires the PCI mailbox module to Nuvoton SoC. Signed-off-by: Hao Wu Signed-off-by: Nabih Estefan Reviewed-by: Tyrone Ting --- docs/system/arm/nuvoton.rst | 2 ++ hw/arm/npcm7xx.c | 3 ++- include/hw/arm/npcm7xx.h | 1 + 3 files changed, 5 insertions(+), 1 deletion(-) diff --git a/docs/system/arm/nuvoton.rst b/docs/system/arm/nuvoton.rst index 0424cae4b0..e611099545 100644 --- a/docs/system/arm/nuvoton.rst +++ b/docs/system/arm/nuvoton.rst @@ -50,6 +50,8 @@ Supported devices * Ethernet controller (EMC) * Tachometer * Peripheral SPI controller (PSPI) + * BIOS POST code FIFO + * PCI Mailbox Missing devices --------------- diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c index c69e936669..c9e87162cb 100644 --- a/hw/arm/npcm7xx.c +++ b/hw/arm/npcm7xx.c @@ -86,7 +86,6 @@ enum NPCM7xxInterrupt { NPCM7XX_UART1_IRQ, NPCM7XX_UART2_IRQ, NPCM7XX_UART3_IRQ, - NPCM7XX_PECI_IRQ = 6, NPCM7XX_PCI_MBOX_IRQ = 8, NPCM7XX_KCS_HIB_IRQ = 9, NPCM7XX_GMAC1_IRQ = 14, @@ -463,6 +462,8 @@ static void npcm7xx_init(Object *obj) object_initialize_child(obj, "pspi[*]", &s->pspi[i], TYPE_NPCM_PSPI); } + object_initialize_child(obj, "pci-mbox", &s->pci_mbox, + TYPE_NPCM7XX_PCI_MBOX); object_initialize_child(obj, "mmc", &s->mmc, TYPE_NPCM7XX_SDHCI); } diff --git a/include/hw/arm/npcm7xx.h b/include/hw/arm/npcm7xx.h index 273090ac60..cec3792a2e 100644 --- a/include/hw/arm/npcm7xx.h +++ b/include/hw/arm/npcm7xx.h @@ -105,6 +105,7 @@ struct NPCM7xxState { OHCISysBusState ohci; NPCM7xxFIUState fiu[2]; NPCM7xxEMCState emc[2]; + NPCM7xxPCIMBoxState pci_mbox; NPCM7xxSDHCIState mmc; NPCMPSPIState pspi[2]; };