@@ -203,7 +203,8 @@ F: tests/tcg/aarch64/
F: tests/qtest/arm-cpu-features.c
F: hw/arm/
F: hw/cpu/a*mpcore.c
-F: include/hw/cpu/a*mpcore.h
+F: include/hw/cpu/arm11mpcore.h
+F: include/hw/cpu/cortex_mpcore.h
F: docs/system/target-arm.rst
F: docs/system/arm/cpu-features.rst
@@ -12,7 +12,7 @@
#ifndef ASPEED_SOC_H
#define ASPEED_SOC_H
-#include "hw/cpu/a15mpcore.h"
+#include "hw/cpu/cortex_mpcore.h"
#include "hw/arm/armv7m.h"
#include "hw/intc/aspeed_vic.h"
#include "hw/misc/aspeed_scu.h"
@@ -26,7 +26,7 @@
#include "hw/or-irq.h"
#include "hw/sysbus.h"
-#include "hw/cpu/a9mpcore.h"
+#include "hw/cpu/cortex_mpcore.h"
#include "hw/intc/exynos4210_gic.h"
#include "hw/intc/exynos4210_combiner.h"
#include "hw/core/split-irq.h"
@@ -17,7 +17,7 @@
#ifndef FSL_IMX6_H
#define FSL_IMX6_H
-#include "hw/cpu/a9mpcore.h"
+#include "hw/cpu/cortex_mpcore.h"
#include "hw/misc/imx6_ccm.h"
#include "hw/misc/imx6_src.h"
#include "hw/misc/imx7_snvs.h"
@@ -17,7 +17,7 @@
#ifndef FSL_IMX6UL_H
#define FSL_IMX6UL_H
-#include "hw/cpu/a15mpcore.h"
+#include "hw/cpu/cortex_mpcore.h"
#include "hw/misc/imx6ul_ccm.h"
#include "hw/misc/imx6_src.h"
#include "hw/misc/imx7_snvs.h"
@@ -19,7 +19,7 @@
#ifndef FSL_IMX7_H
#define FSL_IMX7_H
-#include "hw/cpu/a15mpcore.h"
+#include "hw/cpu/cortex_mpcore.h"
#include "hw/intc/imx_gpcv2.h"
#include "hw/misc/imx7_ccm.h"
#include "hw/misc/imx7_snvs.h"
@@ -19,7 +19,7 @@
#include "hw/boards.h"
#include "hw/adc/npcm7xx_adc.h"
#include "hw/core/split-irq.h"
-#include "hw/cpu/a9mpcore.h"
+#include "hw/cpu/cortex_mpcore.h"
#include "hw/gpio/npcm7xx_gpio.h"
#include "hw/i2c/npcm7xx_smbus.h"
#include "hw/mem/npcm7xx_mc.h"
deleted file mode 100644
@@ -1,44 +0,0 @@
-/*
- * Cortex-A15MPCore internal peripheral emulation.
- *
- * Copyright (c) 2012 Linaro Limited.
- * Written by Peter Maydell.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, see <http://www.gnu.org/licenses/>.
- */
-#ifndef HW_CPU_A15MPCORE_H
-#define HW_CPU_A15MPCORE_H
-
-#include "hw/sysbus.h"
-#include "hw/intc/arm_gic.h"
-#include "qom/object.h"
-
-/* A15MP private memory region. */
-
-#define TYPE_A15MPCORE_PRIV "a15mpcore_priv"
-OBJECT_DECLARE_SIMPLE_TYPE(A15MPPrivState, A15MPCORE_PRIV)
-
-struct A15MPPrivState {
- /*< private >*/
- SysBusDevice parent_obj;
- /*< public >*/
-
- uint32_t num_cpu;
- uint32_t num_irq;
- MemoryRegion container;
-
- GICState gic;
-};
-
-#endif
similarity index 57%
rename from include/hw/cpu/a9mpcore.h
rename to include/hw/cpu/cortex_mpcore.h
@@ -1,29 +1,27 @@
/*
- * Cortex-A9MPCore internal peripheral emulation.
+ * Cortex-MPCore internal peripheral emulation.
*
* Copyright (c) 2009 CodeSourcery.
- * Copyright (c) 2011 Linaro Limited.
+ * Copyright (c) 2011, 2012, 2023 Linaro Limited.
* Written by Paul Brook, Peter Maydell.
*
- * This code is licensed under the GPL.
+ * SPDX-License-Identifier: GPL-2.0-or-later
*/
-#ifndef HW_CPU_A9MPCORE_H
-#define HW_CPU_A9MPCORE_H
+#ifndef HW_CPU_CORTEX_MPCORE_H
+#define HW_CPU_CORTEX_MPCORE_H
+#include "qom/object.h"
#include "hw/sysbus.h"
#include "hw/intc/arm_gic.h"
#include "hw/misc/a9scu.h"
-#include "hw/timer/arm_mptimer.h"
#include "hw/timer/a9gtimer.h"
-#include "qom/object.h"
+#include "hw/timer/arm_mptimer.h"
#define TYPE_A9MPCORE_PRIV "a9mpcore_priv"
OBJECT_DECLARE_SIMPLE_TYPE(A9MPPrivState, A9MPCORE_PRIV)
struct A9MPPrivState {
- /*< private >*/
SysBusDevice parent_obj;
- /*< public >*/
uint32_t num_cpu;
MemoryRegion container;
@@ -36,4 +34,17 @@ struct A9MPPrivState {
ARMMPTimerState wdt;
};
+#define TYPE_A15MPCORE_PRIV "a15mpcore_priv"
+OBJECT_DECLARE_SIMPLE_TYPE(A15MPPrivState, A15MPCORE_PRIV)
+
+struct A15MPPrivState {
+ SysBusDevice parent_obj;
+
+ uint32_t num_cpu;
+ uint32_t num_irq;
+ MemoryRegion container;
+
+ GICState gic;
+};
+
#endif
@@ -24,7 +24,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "cpu.h"
-#include "hw/cpu/a9mpcore.h"
+#include "hw/cpu/cortex_mpcore.h"
#include "hw/irq.h"
#include "sysemu/blockdev.h"
#include "sysemu/sysemu.h"
@@ -31,8 +31,7 @@
#include "qemu/error-report.h"
#include "hw/char/pl011.h"
#include "hw/ide/ahci.h"
-#include "hw/cpu/a9mpcore.h"
-#include "hw/cpu/a15mpcore.h"
+#include "hw/cpu/cortex_mpcore.h"
#include "qemu/log.h"
#include "qom/object.h"
#include "cpu.h"
@@ -24,7 +24,7 @@
#include "hw/i2c/i2c.h"
#include "qemu/error-report.h"
#include "hw/char/pl011.h"
-#include "hw/cpu/a9mpcore.h"
+#include "hw/cpu/cortex_mpcore.h"
#include "hw/intc/realview_gic.h"
#include "hw/irq.h"
#include "hw/i2c/arm_sbcon_i2c.h"
@@ -39,8 +39,7 @@
#include "qemu/error-report.h"
#include <libfdt.h>
#include "hw/char/pl011.h"
-#include "hw/cpu/a9mpcore.h"
-#include "hw/cpu/a15mpcore.h"
+#include "hw/cpu/cortex_mpcore.h"
#include "hw/i2c/arm_sbcon_i2c.h"
#include "hw/sd/sd.h"
#include "qapi/qmp/qlist.h"
@@ -33,7 +33,7 @@
#include "hw/sd/sdhci.h"
#include "hw/char/cadence_uart.h"
#include "hw/net/cadence_gem.h"
-#include "hw/cpu/a9mpcore.h"
+#include "hw/cpu/cortex_mpcore.h"
#include "hw/qdev-clock.h"
#include "sysemu/reset.h"
#include "qom/object.h"
@@ -21,7 +21,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu/module.h"
-#include "hw/cpu/a15mpcore.h"
+#include "hw/cpu/cortex_mpcore.h"
#include "hw/irq.h"
#include "hw/qdev-properties.h"
#include "sysemu/kvm.h"
@@ -11,7 +11,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu/module.h"
-#include "hw/cpu/a9mpcore.h"
+#include "hw/cpu/cortex_mpcore.h"
#include "hw/irq.h"
#include "hw/qdev-properties.h"
#include "hw/core/cpu.h"
Merge Cortex-A{9,15} MPCore devices in the same header. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- MAINTAINERS | 3 +- include/hw/arm/aspeed_soc.h | 2 +- include/hw/arm/exynos4210.h | 2 +- include/hw/arm/fsl-imx6.h | 2 +- include/hw/arm/fsl-imx6ul.h | 2 +- include/hw/arm/fsl-imx7.h | 2 +- include/hw/arm/npcm7xx.h | 2 +- include/hw/cpu/a15mpcore.h | 44 ------------------- .../hw/cpu/{a9mpcore.h => cortex_mpcore.h} | 29 ++++++++---- hw/arm/exynos4210.c | 2 +- hw/arm/highbank.c | 3 +- hw/arm/realview.c | 2 +- hw/arm/vexpress.c | 3 +- hw/arm/xilinx_zynq.c | 2 +- hw/cpu/a15mpcore.c | 2 +- hw/cpu/a9mpcore.c | 2 +- 16 files changed, 35 insertions(+), 69 deletions(-) delete mode 100644 include/hw/cpu/a15mpcore.h rename include/hw/cpu/{a9mpcore.h => cortex_mpcore.h} (57%)