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Mon, 20 Nov 2023 23:52:04 GMT Received: from smtpav06.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 232AF58043; Mon, 20 Nov 2023 23:52:04 +0000 (GMT) Received: from smtpav06.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E683958055; Mon, 20 Nov 2023 23:52:03 +0000 (GMT) Received: from mamboa4.aus.stglabs.ibm.com (unknown [9.3.84.87]) by smtpav06.dal12v.mail.ibm.com (Postfix) with ESMTP; Mon, 20 Nov 2023 23:52:03 +0000 (GMT) From: Glenn Miles To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Cc: Glenn Miles , =?utf-8?q?C=C3=A9dric_Le_Goater?= , Nicholas Piggin , =?utf-8?b?RnLDqWTDqXJpYyBCYXJyYXQ=?= Subject: [PATCH v4 05/11] ppc/pnv: Wire up pca9552 GPIO pins for PCIe hotplug power control Date: Mon, 20 Nov 2023 17:51:06 -0600 Message-Id: <20231120235112.1951342-6-milesg@linux.vnet.ibm.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20231120235112.1951342-1-milesg@linux.vnet.ibm.com> References: <20231120235112.1951342-1-milesg@linux.vnet.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: O1ySqcyFkj1357BomV9Hz2GcSYbyPB3Y X-Proofpoint-ORIG-GUID: kLU5tceKL19oVfx-_d8WL6LntVf06eJL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-20_22,2023-11-20_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 bulkscore=0 adultscore=0 clxscore=1015 phishscore=0 mlxscore=0 priorityscore=1501 impostorscore=0 suspectscore=0 malwarescore=0 spamscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2311200175 Received-SPF: none client-ip=148.163.156.1; envelope-from=milesg@linux.vnet.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org For power10-rainier, a pca9552 device is used for PCIe slot hotplug power control by the Power Hypervisor code. The code expects that some time after it enables power to a PCIe slot by asserting one of the pca9552 GPIO pins 0-4, it should see a "power good" signal asserted on one of pca9552 GPIO pins 5-9. To simulate this behavior, we simply connect the GPIO outputs for pins 0-4 to the GPIO inputs for pins 5-9. Each PCIe slot is assigned 3 GPIO pins on the pca9552 device, for control of up to 5 PCIe slots. The per-slot signal names are: SLOTx_EN.......PHYP uses this as an output to enable slot power. We connect this to the SLOTx_PG pin to simulate a PGOOD signal. SLOTx_PG.......PHYP uses this as in input to detect PGOOD for the slot. For our purposes we just connect this to the SLOTx_EN output. SLOTx_Control..PHYP uses this as an output to prevent a race condition in the real hotplug circuitry, but we can ignore this output for simulation. Signed-off-by: Glenn Miles --- Changes from previous version: - Code moved from pnv_chip_power10_realize to pnv_rainier_i2c_init hw/ppc/pnv.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 9cefcd0fd6..80d25fc1bd 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1898,8 +1898,24 @@ static void pnv_rainier_i2c_init(PnvMachineState *pnv) * Add a PCA9552 I2C device for PCIe hotplug control * to engine 2, bus 1, address 0x63 */ - i2c_slave_create_simple(chip10->i2c[2].busses[1], - "pca9552", 0x63); + I2CSlave *hotplug = i2c_slave_create_simple(chip10->i2c[2].busses[1], + "pca9552", 0x63); + + /* + * Connect PCA9552 GPIO pins 0-4 (SLOTx_EN) outputs to GPIO pins 5-9 + * (SLOTx_PG) inputs in order to fake the pgood state of PCIe slots + * after hypervisor code sets a SLOTx_EN pin high. + */ + qdev_connect_gpio_out(DEVICE(hotplug), 0, + qdev_get_gpio_in(DEVICE(hotplug), 5)); + qdev_connect_gpio_out(DEVICE(hotplug), 1, + qdev_get_gpio_in(DEVICE(hotplug), 6)); + qdev_connect_gpio_out(DEVICE(hotplug), 2, + qdev_get_gpio_in(DEVICE(hotplug), 7)); + qdev_connect_gpio_out(DEVICE(hotplug), 3, + qdev_get_gpio_in(DEVICE(hotplug), 8)); + qdev_connect_gpio_out(DEVICE(hotplug), 4, + qdev_get_gpio_in(DEVICE(hotplug), 9)); } }