From patchwork Mon Nov 13 21:39:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 1863386 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=X45pBnHA; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4STjY63xyrz1yRG for ; Tue, 14 Nov 2023 08:41:14 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1r2eeZ-00067u-2Y; Mon, 13 Nov 2023 16:39:31 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r2eeX-00067m-Vo for qemu-devel@nongnu.org; Mon, 13 Nov 2023 16:39:30 -0500 Received: from mail-pf1-x431.google.com ([2607:f8b0:4864:20::431]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1r2eeW-0001U8-BJ for qemu-devel@nongnu.org; Mon, 13 Nov 2023 16:39:29 -0500 Received: by mail-pf1-x431.google.com with SMTP id d2e1a72fcca58-6c32a20d5dbso4330477b3a.1 for ; Mon, 13 Nov 2023 13:39:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1699911565; x=1700516365; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0cYVqzO8TRpxKmALsybQRSCPXQl71TGGunhIS2IHSCc=; b=X45pBnHA6nFygopiOOeSbPn5vRI0bA7SpRKGCpAqVpY4oDvUWBcuKWXZKag7eIn8gc vnuC2CwYG6o5NVnS8nSH9gPx8BfxGezN9Yl2z+jW5P5siCb0U2MaDGSlnQdlYmqyjrSM 8zjSV0FRdT99ALwdIQ/taZA2OdnTsWRv0kK+rnjcH9jUqn/PpdcKYZsSq9psE/bo0DhZ PEqZrcxCd+DMLcLuHsdx2ZbdUAoaW70B1+HZIVDQY8tT5OtsM5Zn/PUGbfCTW8qHtLsf e6kTwlfXh5bb1XfG5OWSjcL2cbaj272uDzHHRmsQsC12lfyEQG9cwo4AMeYq2e+PfuNn Ucwg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699911565; x=1700516365; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0cYVqzO8TRpxKmALsybQRSCPXQl71TGGunhIS2IHSCc=; b=ekaQ2Ss+08F0T/oWTR65S/7PWG717I950LtvfwcltJeiFIsNWv5JaIQ7i9gKpsVioF Y+a1sjLMtCokTez/AnAQhUNIhyQIet9nN0xH3QFpWTQ2FHSbDiQaDY2UVht7CRbRF8L0 XUMb0agwx9uvyOwoMm6N2vNDVBrK9mkbxBs7BuFNMTh+Nkgd7Kf/ce0fC3ACWrzd7mHV JSlyLCvpsfWp/NDq12hO+T6+E7eshjySV996XTk6gzeurEbf3X9Ammo3FbNUnyoqXX1V 6q1IRWF00X6WPuQnYRQ3qPKqTVmacpW15PPKkXMNoJd/1+YNzxl1uIT0kclsd1hLlf/e g5Yg== X-Gm-Message-State: AOJu0YzM4GV3VGl7hCIhR5CcGRX9i3BRVCpHxdd+eNsTFGx0x2DlLPZ6 2Il/FCpqKPQ2/pwiWp03Z5uoitcEKxnWyzaIloc= X-Google-Smtp-Source: AGHT+IFEB5VUjapDjOSfyRlzTO8hykZtlUHg8/fUep3SZnlVzXLOBs3mMz7Fwmp0/x7QwlhrBUsM0Q== X-Received: by 2002:a05:6a20:cea6:b0:185:a59a:d37d with SMTP id if38-20020a056a20cea600b00185a59ad37dmr5288314pzb.30.1699911564899; Mon, 13 Nov 2023 13:39:24 -0800 (PST) Received: from grind.. ([152.250.131.148]) by smtp.gmail.com with ESMTPSA id a6-20020a170902900600b001c736746d33sm4455423plp.217.2023.11.13.13.39.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Nov 2023 13:39:24 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, Daniel Henrique Barboza , Andrew Jones Subject: [PATCH for-9.0 3/6] target/riscv/tcg: update priv_ver on user_set extensions Date: Mon, 13 Nov 2023 18:39:01 -0300 Message-ID: <20231113213904.185320-4-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231113213904.185320-1-dbarboza@ventanamicro.com> References: <20231113213904.185320-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::431; envelope-from=dbarboza@ventanamicro.com; helo=mail-pf1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org We'll add a new bare CPU type that won't have any default priv_ver. This means that the CPU will default to priv_ver = 0, i.e. 1.10.0. At the same we'll allow these CPUs to enable extensions at will, but then, if the extension has a priv_ver newer than 1.10, we'll end up disabling it. Users will then need to manually set priv_ver to something other than 1.10 to enable the extensions they want, which is not ideal. Change the setter() of extensions to allow user enabled extensions to bump the priv_ver of the CPU. This will make it convenient for users to enable extensions for CPUs that doesn't set a default priv_ver. This change does not affect any existing CPU: vendor CPUs does not allow extensions to be enabled, and generic CPUs are already set to priv_ver LATEST. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones --- target/riscv/tcg/tcg-cpu.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 304211169e..c63b2adb5b 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -114,6 +114,26 @@ static int cpu_cfg_ext_get_min_version(uint32_t ext_offset) g_assert_not_reached(); } +static void cpu_validate_multi_ext_priv_ver(CPURISCVState *env, + uint32_t ext_offset) +{ + int ext_priv_ver; + + if (env->priv_ver == PRIV_VERSION_LATEST) { + return; + } + + ext_priv_ver = cpu_cfg_ext_get_min_version(ext_offset); + + if (env->priv_ver < ext_priv_ver) { + /* + * Note: the 'priv_spec' command line option, if present, + * will take precedence over this priv_ver bump. + */ + env->priv_ver = ext_priv_ver; + } +} + static void cpu_cfg_ext_auto_update(RISCVCPU *cpu, uint32_t ext_offset, bool value) { @@ -748,6 +768,14 @@ static void cpu_set_misa_ext_cfg(Object *obj, Visitor *v, const char *name, return; } + if (misa_bit == RVH && env->priv_ver < PRIV_VERSION_1_12_0) { + /* + * Note: the 'priv_spec' command line option, if present, + * will take precedence over this priv_ver bump. + */ + env->priv_ver = PRIV_VERSION_1_12_0; + } + env->misa_ext |= misa_bit; env->misa_ext_mask |= misa_bit; } else { @@ -877,6 +905,10 @@ static void cpu_set_multi_ext_cfg(Object *obj, Visitor *v, const char *name, return; } + if (value) { + cpu_validate_multi_ext_priv_ver(&cpu->env, multi_ext_cfg->offset); + } + isa_ext_update_enabled(cpu, multi_ext_cfg->offset, value); }