@@ -72,6 +72,19 @@ void cpu_loop(CPULoongArchState *env)
case EXCCODE_BCE:
force_sig_fault(TARGET_SIGSYS, TARGET_SI_KERNEL, env->pc);
break;
+
+ /*
+ * Begin with LSX and LASX disabled, then enable on the first trap.
+ * In this way we can tell if the unit is in use. This is used to
+ * choose the layout of any signal frame.
+ */
+ case EXCCODE_SXD:
+ env->CSR_EUEN |= R_CSR_EUEN_SXE_MASK;
+ break;
+ case EXCCODE_ASXD:
+ env->CSR_EUEN |= R_CSR_EUEN_ASXE_MASK;
+ break;
+
case EXCP_ATOMIC:
cpu_exec_step_atomic(cs);
break;
@@ -4,8 +4,6 @@
* Copyright (c) 2022-2023 Loongson Technology Corporation Limited
*/
-#ifndef CONFIG_USER_ONLY
-
static bool check_vec(DisasContext *ctx, uint32_t oprsz)
{
if ((oprsz == 16) && ((ctx->base.tb->flags & HW_FLAGS_EUEN_SXE) == 0)) {
@@ -21,15 +19,6 @@ static bool check_vec(DisasContext *ctx, uint32_t oprsz)
return true;
}
-#else
-
-static bool check_vec(DisasContext *ctx, uint32_t oprsz)
-{
- return true;
-}
-
-#endif
-
static bool gen_vvvv_ptr_vl(DisasContext *ctx, arg_vvvv *a, uint32_t oprsz,
gen_helper_gvec_4_ptr *fn)
{