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([179.193.10.161]) by smtp.gmail.com with ESMTPSA id z187-20020a2533c4000000b00d9cc49edae9sm329724ybz.63.2023.11.01.13.42.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Nov 2023 13:42:19 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v8 03/19] target/riscv/cpu.c: set satp_max_supported in cpu_riscv_set_satp() Date: Wed, 1 Nov 2023 17:41:48 -0300 Message-ID: <20231101204204.345470-4-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231101204204.345470-1-dbarboza@ventanamicro.com> References: <20231101204204.345470-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::b33; envelope-from=dbarboza@ventanamicro.com; helo=mail-yb1-xb33.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The setter() for the boolean attributes that set satp_mode (sv32, sv39, sv48, sv57, sv64) considers that the CPU will always do a set_satp_mode_max_supported() during cpu_init(). This is not the case for the KVM 'host' CPU, and we'll add another CPU that won't set satp_mode_max() during cpu_init(). Users should be able to set a max_support in these circunstances. Allow cpu_riscv_set_satp() to set satp_mode_max_supported if the CPU didn't set one prior. Signed-off-by: Daniel Henrique Barboza --- target/riscv/cpu.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 822970345c..9f6837ecb7 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1100,6 +1100,7 @@ static void cpu_riscv_get_satp(Object *obj, Visitor *v, const char *name, static void cpu_riscv_set_satp(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { + RISCVCPU *cpu = RISCV_CPU(obj); RISCVSATPMap *satp_map = opaque; uint8_t satp = satp_mode_from_str(name); bool value; @@ -1108,6 +1109,16 @@ static void cpu_riscv_set_satp(Object *obj, Visitor *v, const char *name, return; } + /* + * Allow users to set satp max supported if the CPU didn't + * set any during cpu_init(). First value set to 'true' + * in this case is assumed to be the max supported for + * the CPU. + */ + if (value && cpu->cfg.satp_mode.supported == 0) { + set_satp_mode_max_supported(cpu, satp); + } + satp_map->map = deposit32(satp_map->map, satp, 1, value); satp_map->init |= 1 << satp; }