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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id k8-20020aa79728000000b006875df4773fsm359576pfg.163.2023.10.31.21.11.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 31 Oct 2023 21:11:48 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: mark.cave-ayland@ilande.co.uk Subject: [PATCH v2 17/21] target/sparc: Record entire jump condition in DisasContext Date: Tue, 31 Oct 2023 21:11:28 -0700 Message-Id: <20231101041132.174501-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231101041132.174501-1-richard.henderson@linaro.org> References: <20231101041132.174501-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::435; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Use the original condition instead of consuming cpu_cond, which will now only be live along exception paths. Signed-off-by: Richard Henderson --- target/sparc/translate.c | 27 ++++++++++++++++----------- 1 file changed, 16 insertions(+), 11 deletions(-) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 0bbe4cff3b..5c9a3d45fa 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -146,6 +146,12 @@ static TCGv_i64 cpu_fpr[TARGET_DPREGS]; # define env64_field_offsetof(X) ({ qemu_build_not_reached(); 0; }) #endif +typedef struct DisasCompare { + TCGCond cond; + TCGv c1; + int c2; +} DisasCompare; + typedef struct DisasDelayException { struct DisasDelayException *next; TCGLabel *lab; @@ -159,7 +165,11 @@ typedef struct DisasContext { DisasContextBase base; target_ulong pc; /* current Program Counter: integer or DYNAMIC_PC */ target_ulong npc; /* next PC: integer or DYNAMIC_PC or JUMP_PC */ - target_ulong jump_pc[2]; /* used when JUMP_PC pc value is used */ + + /* Used when JUMP_PC value is used. */ + DisasCompare jump; + target_ulong jump_pc[2]; + int mem_idx; bool fpu_enabled; bool address_mask_32bit; @@ -178,12 +188,6 @@ typedef struct DisasContext { DisasDelayException *delay_excp_list; } DisasContext; -typedef struct { - TCGCond cond; - TCGv c1; - int c2; -} DisasCompare; - // This function uses non-native bit order #define GET_FIELD(X, FROM, TO) \ ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1)) @@ -912,9 +916,9 @@ static void gen_generic_branch(DisasContext *dc) { TCGv npc0 = tcg_constant_tl(dc->jump_pc[0]); TCGv npc1 = tcg_constant_tl(dc->jump_pc[1]); - TCGv zero = tcg_constant_tl(0); + TCGv c2 = tcg_constant_tl(dc->jump.c2); - tcg_gen_movcond_tl(TCG_COND_NE, cpu_npc, cpu_cond, zero, npc0, npc1); + tcg_gen_movcond_tl(dc->jump.cond, cpu_npc, dc->jump.c1, c2, npc0, npc1); } /* call this function before using the condition register as it may @@ -2347,7 +2351,7 @@ static bool advance_pc(DisasContext *dc) case JUMP_PC: /* we can do a static jump */ l1 = gen_new_label(); - tcg_gen_brcondi_tl(TCG_COND_NE, cpu_cond, 0, l1); + tcg_gen_brcondi_tl(dc->jump.cond, dc->jump.c1, dc->jump.c2, l1); /* jump not taken */ gen_goto_tb(dc, 1, dc->jump_pc[1], dc->jump_pc[1] + 4); @@ -2434,9 +2438,10 @@ static bool advance_jump_cond(DisasContext *dc, DisasCompare *cmp, } } else { dc->pc = npc; + dc->npc = JUMP_PC; + dc->jump = *cmp; dc->jump_pc[0] = dest; dc->jump_pc[1] = npc + 4; - dc->npc = JUMP_PC; /* The condition for cpu_cond is always NE -- normalize. */ if (cmp->cond == TCG_COND_NE) {