From patchwork Sat Oct 28 08:54:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 1856479 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=UnF0aXpv; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4SHYKh68nLz1yQ4 for ; Sat, 28 Oct 2023 19:56:08 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qwf5k-0000Ju-JU; Sat, 28 Oct 2023 04:54:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qwf5j-0000JG-8N for qemu-devel@nongnu.org; Sat, 28 Oct 2023 04:54:47 -0400 Received: from mail-yw1-x112e.google.com ([2607:f8b0:4864:20::112e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qwf5h-00048U-Lt for qemu-devel@nongnu.org; Sat, 28 Oct 2023 04:54:47 -0400 Received: by mail-yw1-x112e.google.com with SMTP id 00721157ae682-5a7ac4c3666so22468077b3.3 for ; Sat, 28 Oct 2023 01:54:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1698483283; x=1699088083; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=30+UvmJqpI9/72CZn97DKnyaefnBK9k5vksnhFNW4Jk=; b=UnF0aXpvU4RPWRjkJkEMgAY6iP1AizzwbOntm1oEBeTH4PwOjCfRSVIxFp+/Njwesb LHA+tCB4FeQXKy1Cq0VwpVsjmbOubkyfKd6glYbvFgHKK/NjMErbYEWWC3JH/hEUCgkW AQvWXdKPku9782va3EZmgnxNql9u0s6HGy9S8P/KwIuOv6JvL6iQB3xu07GgvNfLZG0y CkTeZ/5QJinj79R46PxSjaC0lYEALe9x1NS4YLe2Pmt+Z2HqonaeMrvYJexv3MJXTGvh /Ou4//JZ+Z+OCgB6teC1vQrUIt16Tmg3Ym2hpYv5AYL4uJeeVbQCFUpMBYkcI2gVvWgy Z/ew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698483283; x=1699088083; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=30+UvmJqpI9/72CZn97DKnyaefnBK9k5vksnhFNW4Jk=; b=q3Gqa7cL09ksgJ4mkU0B4NTfrXFjkl8Q10ZaNb6jMRJTPJdiwTzGsIpTC4PrGaaCsa RPLDMUpQLEnhq4rAdvOlbmba2Q8wky07xxoyABxwrf+NeTGU8Uh1KVeeZP55sxigHa9v XQWt5eumwVIfjI/NhaJjVQh4CJyT3mtE5zY+fd4L3p4JCXtHvYoXi4aD7hD05A8C7ass xm9pmx1Kpg/LJ4IMxUQ2W2KX+6AFRjdVvB5m2ripEtm1iSAa+kCE80CClZuogZrw6nSb 51nkWLd9wwHkF67Gdytdi9J5aeTyF7gSIfR/A11/2NCyFeTyCpDAZLKjUHe46VkDIcx2 jMcg== X-Gm-Message-State: AOJu0YxTJvkjAoxjQpuPPHXZKVKdx5E7C5snTUQvbEcRUsUtiwJTXFca gZsrLA7r/gxwCLFis7/9Lu8NlyArtt7VfIhO3S4= X-Google-Smtp-Source: AGHT+IHGO8P9q8HFKPS/iTbD7YsgAGuu6EnvhK8droWUroYMwMOWtMV8a5qRjKR+s0+kS5jF63Owbw== X-Received: by 2002:a05:690c:fd5:b0:5a8:7ce7:a35e with SMTP id dg21-20020a05690c0fd500b005a87ce7a35emr5471917ywb.40.1698483283035; Sat, 28 Oct 2023 01:54:43 -0700 (PDT) Received: from grind.dc1.ventanamicro.com ([191.255.2.33]) by smtp.gmail.com with ESMTPSA id t15-20020a81830f000000b00594fff48796sm1604325ywf.75.2023.10.28.01.54.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Oct 2023 01:54:42 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v6 03/12] riscv-qmp-cmds.c: expose named features in cpu_model_expansion Date: Sat, 28 Oct 2023 05:54:18 -0300 Message-ID: <20231028085427.707060-4-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231028085427.707060-1-dbarboza@ventanamicro.com> References: <20231028085427.707060-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::112e; envelope-from=dbarboza@ventanamicro.com; helo=mail-yw1-x112e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Named features (zic64b the sole example at this moment) aren't expose to users, thus we need another way to expose them. Go through each named feature, get its boolean value, do the needed conversions (bool to qbool, qbool to QObject) and add it to output dict. Another adjustment is needed: named features are evaluated during finalize(), so riscv_cpu_finalize_features() needs to be mandatory regardless of whether we have an input dict or not. Otherwise zic64b will always return 'false', which is incorrect: the default values of cache blocksizes (cbom_blocksize and cboz_blocksize) are set to 64, satisfying the conditions for zic64b. Here's an API usage example after this patch: $ ./build/qemu-system-riscv64 -S -M virt -display none -qmp tcp:localhost:1234,server,wait=off $ ./scripts/qmp/qmp-shell localhost:1234 Welcome to the QMP low-level shell! Connected to QEMU 8.1.50 (QEMU) query-cpu-model-expansion type=full model={"name":"rv64"} {"return": {"model": {"name": "rv64", "props": {... "zic64b": true, ...}}}} zic64b is set to 'true', as expected, since all cache sizes are 64 bytes by default. If we change one of the cache blocksizes, zic64b is returned as 'false': (QEMU) query-cpu-model-expansion type=full model={"name":"rv64","props":{"cbom_blocksize":128}} {"return": {"model": {"name": "rv64", "props": {... "zic64b": false, ...}}}} Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones --- target/riscv/riscv-qmp-cmds.c | 30 +++++++++++++++++++++++++----- 1 file changed, 25 insertions(+), 5 deletions(-) diff --git a/target/riscv/riscv-qmp-cmds.c b/target/riscv/riscv-qmp-cmds.c index 2f2dbae7c8..5ada279776 100644 --- a/target/riscv/riscv-qmp-cmds.c +++ b/target/riscv/riscv-qmp-cmds.c @@ -26,6 +26,7 @@ #include "qapi/error.h" #include "qapi/qapi-commands-machine-target.h" +#include "qapi/qmp/qbool.h" #include "qapi/qmp/qdict.h" #include "qapi/qmp/qerror.h" #include "qapi/qobject-input-visitor.h" @@ -99,6 +100,22 @@ static void riscv_obj_add_multiext_props(Object *obj, QDict *qdict_out, } } +static void riscv_obj_add_named_feats_qdict(Object *obj, QDict *qdict_out) +{ + const RISCVCPUMultiExtConfig *named_cfg; + RISCVCPU *cpu = RISCV_CPU(obj); + QObject *value; + bool flag_val; + + for (int i = 0; riscv_cpu_named_features[i].name != NULL; i++) { + named_cfg = &riscv_cpu_named_features[i]; + flag_val = isa_ext_is_enabled(cpu, named_cfg->offset); + value = QOBJECT(qbool_from_bool(flag_val)); + + qdict_put_obj(qdict_out, named_cfg->name, value); + } +} + static void riscv_cpuobj_validate_qdict_in(Object *obj, QObject *props, const QDict *qdict_in, Error **errp) @@ -129,11 +146,6 @@ static void riscv_cpuobj_validate_qdict_in(Object *obj, QObject *props, goto err; } - riscv_cpu_finalize_features(RISCV_CPU(obj), &local_err); - if (local_err) { - goto err; - } - visit_end_struct(visitor, NULL); err: @@ -191,6 +203,13 @@ CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type, } } + riscv_cpu_finalize_features(RISCV_CPU(obj), &local_err); + if (local_err) { + error_propagate(errp, local_err); + object_unref(obj); + return NULL; + } + expansion_info = g_new0(CpuModelExpansionInfo, 1); expansion_info->model = g_malloc0(sizeof(*expansion_info->model)); expansion_info->model->name = g_strdup(model->name); @@ -200,6 +219,7 @@ CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type, riscv_obj_add_multiext_props(obj, qdict_out, riscv_cpu_extensions); riscv_obj_add_multiext_props(obj, qdict_out, riscv_cpu_experimental_exts); riscv_obj_add_multiext_props(obj, qdict_out, riscv_cpu_vendor_exts); + riscv_obj_add_named_feats_qdict(obj, qdict_out); /* Add our CPU boolean options too */ riscv_obj_add_qdict_prop(obj, qdict_out, "mmu");