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[176.171.212.97]) by smtp.gmail.com with ESMTPSA id c21-20020a50d655000000b00537963f692esm1813284edj.0.2023.10.20.09.37.47 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 20 Oct 2023 09:37:49 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , Richard Henderson , Paolo Bonzini , Alistair Francis , qemu-arm@nongnu.org, qemu-riscv@nongnu.org, "Edgar E. Iglesias" , qemu-ppc@nongnu.org, Eduardo Habkost , "Michael S. Tsirkin" , qemu-s390x@nongnu.org, Peter Maydell , =?utf-8?q?Alex_Benn=C3=A9e?= , Zhao Liu , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 08/19] cpus: Filter for target specific CPU (ppc) Date: Fri, 20 Oct 2023 18:36:30 +0200 Message-ID: <20231020163643.86105-9-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231020163643.86105-1-philmd@linaro.org> References: <20231020163643.86105-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52e; envelope-from=philmd@linaro.org; helo=mail-ed1-x52e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Enforce qemu_get_cpu() to return PPC CPUs in PPC specific files. Mechanical change using the following coccinelle script: @@ expression index; @@ - qemu_get_cpu(index, NULL) + qemu_get_cpu(index, TYPE_POWERPC_CPU) Signed-off-by: Philippe Mathieu-Daudé --- hw/ppc/e500.c | 2 +- hw/ppc/ppce500_spin.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 380bbe1fe6..c4bf3fef32 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -495,7 +495,7 @@ static int ppce500_load_device_tree(PPCE500MachineState *pms, char *cpu_name; uint64_t cpu_release_addr = pmc->spin_base + (i * 0x20); - cpu = qemu_get_cpu(i, NULL); + cpu = qemu_get_cpu(i, TYPE_POWERPC_CPU); if (cpu == NULL) { continue; } diff --git a/hw/ppc/ppce500_spin.c b/hw/ppc/ppce500_spin.c index 3b113fbbdb..142bd45f18 100644 --- a/hw/ppc/ppce500_spin.c +++ b/hw/ppc/ppce500_spin.c @@ -125,7 +125,7 @@ static void spin_write(void *opaque, hwaddr addr, uint64_t value, SpinInfo *curspin = &s->spin[env_idx]; uint8_t *curspin_p = (uint8_t*)curspin; - cpu = qemu_get_cpu(env_idx, NULL); + cpu = qemu_get_cpu(env_idx, TYPE_POWERPC_CPU); if (cpu == NULL) { /* Unknown CPU */ return;