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[176.171.218.149]) by smtp.gmail.com with ESMTPSA id 2-20020a170906224200b009c6e58437dasm1783529ejr.37.2023.10.18.07.12.16 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 18 Oct 2023 07:12:19 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Eric Farman , Peter Xu , "Michael S. Tsirkin" , Halil Pasic , Jiaxun Yang , Strahinja Jankovic , Eduardo Habkost , Sergio Lopez , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Peter Maydell , Marcel Apfelbaum , Jason Wang , qemu-arm@nongnu.org, qemu-s390x@nongnu.org, Ilya Leoshkevich , Song Gao , Huacai Chen , Beniamino Galvani , Christian Borntraeger , Thomas Huth , David Hildenbrand , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Paolo Bonzini Subject: [PATCH 03/12] hw/misc/allwinner-dramc: Move sysbus_mmio_map call from init -> realize Date: Wed, 18 Oct 2023 16:11:41 +0200 Message-ID: <20231018141151.87466-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231018141151.87466-1-philmd@linaro.org> References: <20231018141151.87466-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::636; envelope-from=philmd@linaro.org; helo=mail-ej1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org In order to make the next commit trivial, move the sysbus_init_mmio() call in allwinner_r40_dramc_init() just before the corresponding sysbus_mmio_map_overlap() call in allwinner_r40_dramc_realize(). Signed-off-by: Philippe Mathieu-Daudé --- hw/misc/allwinner-r40-dramc.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/hw/misc/allwinner-r40-dramc.c b/hw/misc/allwinner-r40-dramc.c index 6944f84455..2cc0254a55 100644 --- a/hw/misc/allwinner-r40-dramc.c +++ b/hw/misc/allwinner-r40-dramc.c @@ -414,6 +414,7 @@ static void allwinner_r40_dramc_reset(DeviceState *dev) static void allwinner_r40_dramc_realize(DeviceState *dev, Error **errp) { AwR40DramCtlState *s = AW_R40_DRAMC(dev); + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); if (!get_match_ddr(s->ram_size)) { error_report("%s: ram-size %u MiB is not supported", @@ -421,8 +422,12 @@ static void allwinner_r40_dramc_realize(DeviceState *dev, Error **errp) exit(1); } - /* detect_cells */ - sysbus_mmio_map_overlap(SYS_BUS_DEVICE(s), 3, s->ram_addr, 10); + /* R40 support max 2G memory but we only support up to 1G now. index 3 */ + memory_region_init_io(&s->detect_cells, OBJECT(s), + &allwinner_r40_detect_ops, s, + "DRAMCELLS", 1 * GiB); + sysbus_init_mmio(sbd, &s->detect_cells); + sysbus_mmio_map_overlap(sbd, 3, s->ram_addr, 10); memory_region_set_enabled(&s->detect_cells, false); /* @@ -458,12 +463,6 @@ static void allwinner_r40_dramc_init(Object *obj) &allwinner_r40_dramphy_ops, s, "DRAMPHY", 4 * KiB); sysbus_init_mmio(sbd, &s->dramphy_iomem); - - /* R40 support max 2G memory but we only support up to 1G now. index 3 */ - memory_region_init_io(&s->detect_cells, OBJECT(s), - &allwinner_r40_detect_ops, s, - "DRAMCELLS", 1 * GiB); - sysbus_init_mmio(sbd, &s->detect_cells); } static Property allwinner_r40_dramc_properties[] = {