From patchwork Fri Oct 13 14:01:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1848303 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=w1S/4yvj; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4S6Svm3nmYz1yqZ for ; Sat, 14 Oct 2023 01:05:40 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qrImY-000559-RS; Fri, 13 Oct 2023 10:04:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qrIlO-0000iG-2z for qemu-devel@nongnu.org; Fri, 13 Oct 2023 10:03:41 -0400 Received: from mail-ed1-x52d.google.com ([2a00:1450:4864:20::52d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qrIlD-0002ZL-I6 for qemu-devel@nongnu.org; Fri, 13 Oct 2023 10:03:37 -0400 Received: by mail-ed1-x52d.google.com with SMTP id 4fb4d7f45d1cf-53dd3f169d8so3723569a12.3 for ; Fri, 13 Oct 2023 07:03:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697205804; x=1697810604; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=XHKXv6KA5uR9pwP6emCinBR3kfpLZBEMec/UWasLWx0=; b=w1S/4yvj0W2gC2wnjLq9Dqrvp+k9UpLHMlopUDxWhxfTJpKTJrc3ckeTafmPswLLi9 tHPm2GhEizm1BM0w9WkyDget/4Per1UaYXLZkX60g7i/KMELn4pPq3lJA8tw5b8MKyTk 6f4hg/7eSCMCz8rGn0/ogMx0e+AHKfgb56+U1imoqJ83N4Wi3uI4u/H4p5b3a+myT/We 4WARw0G+KZa+fS/aXPkJhGjUyQezQteWmvxenBlsKtQ8J3B4BSVxMJzHzsoURWkSZ/gk SevpKG/BxQkk6l09phoOIPKtXer53nGh0vYATlr8libYJ2Kw/+cTGt/isNEiOLgLe9xH Pfkg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697205804; x=1697810604; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=XHKXv6KA5uR9pwP6emCinBR3kfpLZBEMec/UWasLWx0=; b=mNujYAvQZJB2VXrUwNoWipYRG3OHqYHdFdAhLvixdK8i1Y0O7tBKwkAeHMW6wSmMkE gctWPn7NC1obLrFN0Iq1DgQm0x0a7JLl+ui1qFjF3RziE5GWcGwPzZ2qtm2itPtHNaoK YG6fmwF9AMHpKLYDAXbHcgBERjPpTfwC5MMvOJcuaaoPSpWiSftQ9tQLcBsZuW+vK8tu iff7w+tq1jnbqQzy94tvfUvHr6x3cYttLkD9F3DiG4UxR1k4IMy5SMceJesVQ9giesgS csxOcM4JCAiTaLR9GQkYD8QaeAd3uyE5EALOVSdhsDhA2eualZamUHCbw9kQCMIarP4A N3CQ== X-Gm-Message-State: AOJu0YxkjzySiTSsXvyMeixv2Gf9uAH4x2PomqxWiN248f111I9SlVjd 9BaI+e21FamIIp9ne6VULMdFaNMDPob1f/4i9ZM= X-Google-Smtp-Source: AGHT+IGG09cZNzxOBXz7APw6Id/rXcgtWCcH74xsqwS4hf9q7d/KlRm7qmtWrBTMngL/h2EBlyX9MA== X-Received: by 2002:a05:6402:3805:b0:53d:ad13:72f6 with SMTP id es5-20020a056402380500b0053dad1372f6mr8866731edb.30.1697205804492; Fri, 13 Oct 2023 07:03:24 -0700 (PDT) Received: from m1x-phil.lan ([176.172.118.168]) by smtp.gmail.com with ESMTPSA id s7-20020aa7c547000000b0052348d74865sm11465680edr.61.2023.10.13.07.03.20 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 13 Oct 2023 07:03:24 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Xiaojuan Yang , "Michael S. Tsirkin" , qemu-ppc@nongnu.org, Aleksandar Rikalo , David Hildenbrand , qemu-s390x@nongnu.org, "Edgar E. Iglesias" , Jiaxun Yang , Song Gao , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Paolo Bonzini , Stafford Horne , Alistair Francis , Yanan Wang , Max Filippov , Artyom Tarasenko , Marcel Apfelbaum , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Laurent Vivier , Aurelien Jarno , qemu-riscv@nongnu.org, Palmer Dabbelt , Yoshinori Sato , Bastian Koppelmann , Bin Meng , Daniel Henrique Barboza , Mark Cave-Ayland , Weiwei Li , Daniel Henrique Barboza , Nicholas Piggin , qemu-arm@nongnu.org, Liu Zhiwei , Marek Vasut , Laurent Vivier , Peter Maydell , Brian Cain , Thomas Huth , Chris Wulff , Sergio Lopez , Richard Henderson , Ilya Leoshkevich , Michael Rolnik Subject: [PATCH v2 13/16] target/i386: Declare CPU QOM types using DEFINE_TYPES() macro Date: Fri, 13 Oct 2023 16:01:12 +0200 Message-ID: <20231013140116.255-14-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231013140116.255-1-philmd@linaro.org> References: <20231013140116.255-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52d; envelope-from=philmd@linaro.org; helo=mail-ed1-x52d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org When multiple QOM types are registered in the same file, it is simpler to use the the DEFINE_TYPES() macro. In particular because type array declared with such macro are easier to review. In few commits we are going to add more types, so replace the type_register_static() to ease further reviews. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Zhao Liu --- target/i386/cpu.c | 50 ++++++++++++++++++++++------------------------- 1 file changed, 23 insertions(+), 27 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 3aab05ddad..81b05d421c 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -4990,13 +4990,6 @@ static void max_x86_cpu_initfn(Object *obj) &error_abort); } -static const TypeInfo max_x86_cpu_type_info = { - .name = X86_CPU_TYPE_NAME("max"), - .parent = TYPE_X86_CPU, - .instance_init = max_x86_cpu_initfn, - .class_init = max_x86_cpu_class_init, -}; - static char *feature_word_description(FeatureWordInfo *f, uint32_t bit) { assert(f->type == CPUID_FEATURE_WORD || f->type == MSR_FEATURE_WORD); @@ -8018,19 +8011,6 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) } } -static const TypeInfo x86_cpu_type_info = { - .name = TYPE_X86_CPU, - .parent = TYPE_CPU, - .instance_size = sizeof(X86CPU), - .instance_align = __alignof(X86CPU), - .instance_init = x86_cpu_initfn, - .instance_post_init = x86_cpu_post_initfn, - - .abstract = true, - .class_size = sizeof(X86CPUClass), - .class_init = x86_cpu_common_class_init, -}; - /* "base" CPU model, used by query-cpu-model-expansion */ static void x86_cpu_base_class_init(ObjectClass *oc, void *data) { @@ -8042,22 +8022,38 @@ static void x86_cpu_base_class_init(ObjectClass *oc, void *data) xcc->ordering = 8; } -static const TypeInfo x86_base_cpu_type_info = { - .name = X86_CPU_TYPE_NAME("base"), - .parent = TYPE_X86_CPU, - .class_init = x86_cpu_base_class_init, +static const TypeInfo x86_cpu_types[] = { + { + .name = TYPE_X86_CPU, + .parent = TYPE_CPU, + .abstract = true, + .instance_size = sizeof(X86CPU), + .instance_align = __alignof(X86CPU), + .instance_init = x86_cpu_initfn, + .instance_post_init = x86_cpu_post_initfn, + .class_size = sizeof(X86CPUClass), + .class_init = x86_cpu_common_class_init, + }, { + .name = X86_CPU_TYPE_NAME("base"), + .parent = TYPE_X86_CPU, + .class_init = x86_cpu_base_class_init, + }, { + .name = X86_CPU_TYPE_NAME("max"), + .parent = TYPE_X86_CPU, + .instance_init = max_x86_cpu_initfn, + .class_init = max_x86_cpu_class_init, + } }; +DEFINE_TYPES(x86_cpu_types) + static void x86_cpu_register_types(void) { int i; - type_register_static(&x86_cpu_type_info); for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); i++) { x86_register_cpudef_types(&builtin_x86_defs[i]); } - type_register_static(&max_x86_cpu_type_info); - type_register_static(&x86_base_cpu_type_info); } type_init(x86_cpu_register_types)