From patchwork Wed Oct 11 15:13:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ninad Palsule X-Patchwork-Id: 1846817 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=LH75RFim; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4S5Gc742tRz23jd for ; Thu, 12 Oct 2023 02:17:59 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qqawq-0000Hr-10; Wed, 11 Oct 2023 11:16:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qqawm-0000GN-51; Wed, 11 Oct 2023 11:16:28 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qqawX-0005Z1-Mc; Wed, 11 Oct 2023 11:16:21 -0400 Received: from pps.filterd (m0353728.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 39BFD6Yn017131; Wed, 11 Oct 2023 15:16:01 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type : content-transfer-encoding; s=pp1; bh=oOPtxFQpLg3Pmfrx6is/qbojWlnDKo92HmXR3Bt6ipg=; b=LH75RFimIn1WH4JT7Mef7TbWhKrmWs+IkKPEP/N0MimTjS9IJn9onVXYon01bu7ZlEz9 tLPGm/baB79e9YF4SuiB+fkh0o+DlFrgX8hVjN2EqzXDECIjkB1sjrr39BtsGZXbhING L/Q2rtE12oZZH9nQ9vN4+QMjONMjr4T987gi1QyK9lq2ZmSEstmRNBWec2fN5a5Ixdjf 5QNGl+1GsPyrgYQkTESoMvFnOXF6KWRILjMdWDtQuFSgjbT12slnHYFDhJaMQ5TGOtl2 9EIcVag3ofAU9oUhDnbMvSH6p3XuVSEgtTXQBH6j4xziTX/tsAFEE/cRiZetVP2ZPHqL 8w== Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3tnx0d0n2g-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 11 Oct 2023 15:16:00 +0000 Received: from m0353728.ppops.net (m0353728.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 39BF2d4d023037; Wed, 11 Oct 2023 15:14:27 GMT Received: from ppma13.dal12v.mail.ibm.com (dd.9e.1632.ip4.static.sl-reverse.com [50.22.158.221]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3tnx0d0he8-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 11 Oct 2023 15:14:27 +0000 Received: from pps.filterd (ppma13.dal12v.mail.ibm.com [127.0.0.1]) by ppma13.dal12v.mail.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 39BD8dSS001170; Wed, 11 Oct 2023 15:13:44 GMT Received: from smtprelay06.wdc07v.mail.ibm.com ([172.16.1.73]) by ppma13.dal12v.mail.ibm.com (PPS) with ESMTPS id 3tkkvk0gk1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 11 Oct 2023 15:13:44 +0000 Received: from smtpav05.dal12v.mail.ibm.com (smtpav05.dal12v.mail.ibm.com [10.241.53.104]) by smtprelay06.wdc07v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 39BFDhJg23134838 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 11 Oct 2023 15:13:43 GMT Received: from smtpav05.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5002D58067; Wed, 11 Oct 2023 15:13:43 +0000 (GMT) Received: from smtpav05.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id EC67558068; Wed, 11 Oct 2023 15:13:42 +0000 (GMT) Received: from gfwa153.aus.stglabs.ibm.com (unknown [9.3.84.127]) by smtpav05.dal12v.mail.ibm.com (Postfix) with ESMTP; Wed, 11 Oct 2023 15:13:42 +0000 (GMT) From: Ninad Palsule To: qemu-devel@nongnu.org, clg@kaod.org, peter.maydell@linaro.org, andrew@aj.id.au, joel@jms.id.au, pbonzini@redhat.com, marcandre.lureau@redhat.com, berrange@redhat.com, thuth@redhat.com, philmd@linaro.org, lvivier@redhat.com Cc: Ninad Palsule , qemu-arm@nongnu.org Subject: [PATCH v5 02/10] hw/fsi: Introduce IBM's scratchpad Date: Wed, 11 Oct 2023 10:13:31 -0500 Message-Id: <20231011151339.2782132-3-ninad@linux.ibm.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231011151339.2782132-1-ninad@linux.ibm.com> References: <20231011151339.2782132-1-ninad@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: cz18JuKTIEzUF0-v0ArBsO4lTSLA7EvO X-Proofpoint-GUID: CSQJloHYE8WCfI7kUQU1JQCCwJmbeRXD X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-11_09,2023-10-11_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 adultscore=0 malwarescore=0 spamscore=0 lowpriorityscore=0 priorityscore=1501 mlxscore=0 impostorscore=0 bulkscore=0 suspectscore=0 mlxlogscore=988 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2310110134 Received-SPF: pass client-ip=148.163.156.1; envelope-from=ninad@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This is a part of patchset where scratchpad is introduced. The scratchpad provides a set of non-functional registers. The firmware is free to use them, hardware does not support any special management support. The scratchpad registers can be read or written from LBUS slave. In this model, The LBUS device is parent for the scratchpad. Signed-off-by: Andrew Jeffery Signed-off-by: Cédric Le Goater Signed-off-by: Ninad Palsule --- v2: - Incorporated Joel's review comments. v5: - Incorporated review comments by Cedric. --- include/hw/fsi/engine-scratchpad.h | 33 ++++++++++ hw/fsi/engine-scratchpad.c | 99 ++++++++++++++++++++++++++++++ hw/fsi/Kconfig | 4 ++ hw/fsi/meson.build | 1 + hw/fsi/trace-events | 2 + 5 files changed, 139 insertions(+) create mode 100644 include/hw/fsi/engine-scratchpad.h create mode 100644 hw/fsi/engine-scratchpad.c create mode 100644 hw/fsi/trace-events diff --git a/include/hw/fsi/engine-scratchpad.h b/include/hw/fsi/engine-scratchpad.h new file mode 100644 index 0000000000..17e9570c5c --- /dev/null +++ b/include/hw/fsi/engine-scratchpad.h @@ -0,0 +1,33 @@ +/* + * SPDX-License-Identifier: GPL-2.0-or-later + * Copyright (C) 2023 IBM Corp. + * + * IBM scratchpad engne + */ +#ifndef FSI_ENGINE_SCRATCHPAD_H +#define FSI_ENGINE_SCRATCHPAD_H + +#include "qemu/bitops.h" + +#include "hw/fsi/lbus.h" + +#define ENGINE_CONFIG_NEXT BE_BIT(0) +#define ENGINE_CONFIG_VPD BE_BIT(1) +#define ENGINE_CONFIG_SLOTS BE_GENMASK(8, 15) +#define ENGINE_CONFIG_VERSION BE_GENMASK(16, 19) +#define ENGINE_CONFIG_TYPE BE_GENMASK(20, 27) +#define ENGINE_CONFIG_TYPE_PEEK (0x02 << 4) +#define ENGINE_CONFIG_TYPE_FSI (0x03 << 4) +#define ENGINE_CONFIG_TYPE_SCRATCHPAD (0x06 << 4) +#define ENGINE_CONFIG_CRC BE_GENMASK(28, 31) + +#define TYPE_SCRATCHPAD "scratchpad" +#define SCRATCHPAD(obj) OBJECT_CHECK(ScratchPad, (obj), TYPE_SCRATCHPAD) + +typedef struct ScratchPad { + FSILBusDevice parent; + + uint32_t reg; +} ScratchPad; + +#endif /* FSI_ENGINE_SCRATCHPAD_H */ diff --git a/hw/fsi/engine-scratchpad.c b/hw/fsi/engine-scratchpad.c new file mode 100644 index 0000000000..60f678eec4 --- /dev/null +++ b/hw/fsi/engine-scratchpad.c @@ -0,0 +1,99 @@ +/* + * SPDX-License-Identifier: GPL-2.0-or-later + * Copyright (C) 2023 IBM Corp. + * + * IBM scratchpad engine + */ + +#include "qemu/osdep.h" + +#include "qapi/error.h" +#include "qemu/log.h" +#include "trace.h" + +#include "hw/fsi/engine-scratchpad.h" + +static uint64_t scratchpad_read(void *opaque, hwaddr addr, unsigned size) +{ + ScratchPad *s = SCRATCHPAD(opaque); + + trace_scratchpad_read(addr, size); + + if (addr) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: Out of bounds read: 0x%"HWADDR_PRIx" for %u\n", + __func__, addr, size); + return 0; + } + + return s->reg; +} + +static void scratchpad_write(void *opaque, hwaddr addr, uint64_t data, + unsigned size) +{ + ScratchPad *s = SCRATCHPAD(opaque); + + trace_scratchpad_write(addr, size, data); + + if (addr) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: Out of bounds write: 0x%"HWADDR_PRIx" for %u\n", + __func__, addr, size); + return; + } + + s->reg = data; +} + +static const struct MemoryRegionOps scratchpad_ops = { + .read = scratchpad_read, + .write = scratchpad_write, + .endianness = DEVICE_BIG_ENDIAN, +}; + +static void scratchpad_realize(DeviceState *dev, Error **errp) +{ + FSILBusDevice *ldev = FSI_LBUS_DEVICE(dev); + + memory_region_init_io(&ldev->iomem, OBJECT(ldev), &scratchpad_ops, + ldev, TYPE_SCRATCHPAD, 0x400); +} + +static void scratchpad_reset(DeviceState *dev) +{ + ScratchPad *s = SCRATCHPAD(dev); + + s->reg = 0; +} + +static void scratchpad_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + FSILBusDeviceClass *ldc = FSI_LBUS_DEVICE_CLASS(klass); + + dc->realize = scratchpad_realize; + dc->reset = scratchpad_reset; + + ldc->config = + ENGINE_CONFIG_NEXT /* valid */ + | 0x00010000 /* slots */ + | 0x00001000 /* version */ + | ENGINE_CONFIG_TYPE_SCRATCHPAD /* type */ + | 0x00000007; /* crc */ +} + +static const TypeInfo scratchpad_info = { + .name = TYPE_SCRATCHPAD, + .parent = TYPE_FSI_LBUS_DEVICE, + .instance_size = sizeof(ScratchPad), + .class_init = scratchpad_class_init, + .class_size = sizeof(FSILBusDeviceClass), +}; + +static void scratchpad_register_types(void) +{ + type_register_static(&scratchpad_info); +} + +type_init(scratchpad_register_types); diff --git a/hw/fsi/Kconfig b/hw/fsi/Kconfig index e650c660f0..f7c7fd1b28 100644 --- a/hw/fsi/Kconfig +++ b/hw/fsi/Kconfig @@ -1,2 +1,6 @@ +config FSI_SCRATCHPAD + bool + select FSI_LBUS + config FSI_LBUS bool diff --git a/hw/fsi/meson.build b/hw/fsi/meson.build index 4074d3a7d2..d45a98c223 100644 --- a/hw/fsi/meson.build +++ b/hw/fsi/meson.build @@ -1 +1,2 @@ system_ss.add(when: 'CONFIG_FSI_LBUS', if_true: files('lbus.c')) +system_ss.add(when: 'CONFIG_FSI_SCRATCHPAD', if_true: files('engine-scratchpad.c')) diff --git a/hw/fsi/trace-events b/hw/fsi/trace-events new file mode 100644 index 0000000000..97fd070354 --- /dev/null +++ b/hw/fsi/trace-events @@ -0,0 +1,2 @@ +scratchpad_read(uint64_t addr, uint32_t size) "@0x%" PRIx64 " size=%d" +scratchpad_write(uint64_t addr, uint32_t size, uint64_t data) "@0x%" PRIx64 " size=%d value=0x%"PRIx64