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[88.29.175.5]) by smtp.gmail.com with ESMTPSA id n9-20020adfe789000000b003180fdf5589sm7926499wrm.6.2023.09.18.03.42.16 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 03:42:18 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Anton Johansson , Riku Voipio , Richard Henderson , Claudio Fontana , Yanan Wang , Paolo Bonzini , Alessandro Di Federico , Fabiano Rosas , Marcel Apfelbaum , Daniel Henrique Barboza , Mahmoud Mandour , Eduardo Habkost , Alexandre Iooss , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , =?utf-8?q?Alex?= =?utf-8?q?_Benn=C3=A9e?= Subject: [PATCH 2/3] accel: Introduce cpu_exec_reset_hold() Date: Mon, 18 Sep 2023 12:41:51 +0200 Message-ID: <20230918104153.24433-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918104153.24433-1-philmd@linaro.org> References: <20230918104153.24433-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=philmd@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Introduce cpu_exec_reset_hold() which call an accelerator specific AccelOpsClass::cpu_reset_hold() handler. Define a stub on TCG user emulation, because CPU reset is irrelevant there. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 1 + include/sysemu/accel-ops.h | 1 + accel/tcg/user-exec-stub.c | 4 ++++ hw/core/cpu-common.c | 1 + softmmu/cpus.c | 7 +++++++ 5 files changed, 14 insertions(+) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 92a4234439..7bbfa81dcd 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -1011,6 +1011,7 @@ void cpu_class_init_props(DeviceClass *dc); void cpu_exec_initfn(CPUState *cpu); void cpu_exec_realizefn(CPUState *cpu, Error **errp); void cpu_exec_unrealizefn(CPUState *cpu); +void cpu_exec_reset_hold(CPUState *cpu); /** * target_words_bigendian: diff --git a/include/sysemu/accel-ops.h b/include/sysemu/accel-ops.h index 3c1fab4b1e..ef91fc28bb 100644 --- a/include/sysemu/accel-ops.h +++ b/include/sysemu/accel-ops.h @@ -30,6 +30,7 @@ struct AccelOpsClass { void (*ops_init)(AccelOpsClass *ops); bool (*cpus_are_resettable)(void); + void (*cpu_reset_hold)(CPUState *cpu); void (*create_vcpu_thread)(CPUState *cpu); /* MANDATORY NON-NULL */ void (*kick_vcpu_thread)(CPUState *cpu); diff --git a/accel/tcg/user-exec-stub.c b/accel/tcg/user-exec-stub.c index 874e1f1a20..b1bf8bed89 100644 --- a/accel/tcg/user-exec-stub.c +++ b/accel/tcg/user-exec-stub.c @@ -16,6 +16,10 @@ void qemu_init_vcpu(CPUState *cpu) { } +void cpu_exec_reset_hold(CPUState *cpu) +{ +} + /* User mode emulation does not support record/replay yet. */ bool replay_exception(void) diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index b3b5ce6702..b50bc22fb7 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -137,6 +137,7 @@ static void cpu_common_reset_hold(Object *obj) cpu->crash_occurred = false; cpu->cflags_next_tb = -1; + cpu_exec_reset_hold(cpu); if (tcg_enabled()) { tcg_flush_jmp_cache(cpu); tcg_flush_softmmu_tlb(cpu); diff --git a/softmmu/cpus.c b/softmmu/cpus.c index 0848e0dbdb..952f15868c 100644 --- a/softmmu/cpus.c +++ b/softmmu/cpus.c @@ -201,6 +201,13 @@ bool cpus_are_resettable(void) return true; } +void cpu_exec_reset_hold(CPUState *cpu) +{ + if (cpus_accel->cpu_reset_hold) { + cpus_accel->cpu_reset_hold(cpu); + } +} + int64_t cpus_get_virtual_clock(void) { /*