Message ID | 20230906091647.1667171-8-dbarboza@ventanamicro.com |
---|---|
State | New |
Headers | show |
Series | riscv: split TCG/KVM accelerators from cpu.c | expand |
On 2023/9/6 17:16, Daniel Henrique Barboza wrote: > We'll need to export these arrays to the accelerator classes in the next > patches. Mark them as 'const' now because they should not be modified at > runtime. > > Note that 'riscv_cpu_options' will also be exported, but can't be marked > as 'const', because the properties are changed via > qdev_property_add_static(). > > Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> > Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Zhiwei > --- > target/riscv/cpu.c | 22 +++++++++++++--------- > 1 file changed, 13 insertions(+), 9 deletions(-) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index c15bb572d4..50c2819d68 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -1407,7 +1407,7 @@ typedef struct RISCVCPUMultiExtConfig { > {.name = _name, .offset = CPU_CFG_OFFSET(_prop), \ > .enabled = _defval} > > -static RISCVCPUMultiExtConfig riscv_cpu_extensions[] = { > +static const RISCVCPUMultiExtConfig riscv_cpu_extensions[] = { > /* Defaults for standard extensions */ > MULTI_EXT_CFG_BOOL("sscofpmf", ext_sscofpmf, false), > MULTI_EXT_CFG_BOOL("Zifencei", ext_ifencei, true), > @@ -1469,7 +1469,7 @@ static RISCVCPUMultiExtConfig riscv_cpu_extensions[] = { > DEFINE_PROP_END_OF_LIST(), > }; > > -static RISCVCPUMultiExtConfig riscv_cpu_vendor_exts[] = { > +static const RISCVCPUMultiExtConfig riscv_cpu_vendor_exts[] = { > MULTI_EXT_CFG_BOOL("xtheadba", ext_xtheadba, false), > MULTI_EXT_CFG_BOOL("xtheadbb", ext_xtheadbb, false), > MULTI_EXT_CFG_BOOL("xtheadbs", ext_xtheadbs, false), > @@ -1487,7 +1487,7 @@ static RISCVCPUMultiExtConfig riscv_cpu_vendor_exts[] = { > }; > > /* These are experimental so mark with 'x-' */ > -static RISCVCPUMultiExtConfig riscv_cpu_experimental_exts[] = { > +static const RISCVCPUMultiExtConfig riscv_cpu_experimental_exts[] = { > /* ePMP 0.9.3 */ > MULTI_EXT_CFG_BOOL("x-epmp", epmp, false), > MULTI_EXT_CFG_BOOL("x-smaia", ext_smaia, false), > @@ -1558,7 +1558,7 @@ static void cpu_get_multi_ext_cfg(Object *obj, Visitor *v, const char *name, > } > > static void cpu_add_multi_ext_prop(Object *cpu_obj, > - RISCVCPUMultiExtConfig *multi_cfg) > + const RISCVCPUMultiExtConfig *multi_cfg) > { > object_property_add(cpu_obj, multi_cfg->name, "bool", > cpu_get_multi_ext_cfg, > @@ -1594,11 +1594,13 @@ static void cpu_set_cfg_unavailable(Object *obj, Visitor *v, > #endif > > static void riscv_cpu_add_multiext_prop_array(Object *obj, > - RISCVCPUMultiExtConfig *array) > + const RISCVCPUMultiExtConfig *array) > { > + const RISCVCPUMultiExtConfig *prop; > + > g_assert(array); > > - for (RISCVCPUMultiExtConfig *prop = array; prop && prop->name; prop++) { > + for (prop = array; prop && prop->name; prop++) { > cpu_add_multi_ext_prop(obj, prop); > } > } > @@ -1622,11 +1624,13 @@ static void riscv_cpu_add_kvm_unavail_prop(Object *obj, const char *prop_name) > } > > static void riscv_cpu_add_kvm_unavail_prop_array(Object *obj, > - RISCVCPUMultiExtConfig *array) > + const RISCVCPUMultiExtConfig *array) > { > + const RISCVCPUMultiExtConfig *prop; > + > g_assert(array); > > - for (RISCVCPUMultiExtConfig *prop = array; prop && prop->name; prop++) { > + for (prop = array; prop && prop->name; prop++) { > riscv_cpu_add_kvm_unavail_prop(obj, prop->name); > } > } > @@ -1689,7 +1693,7 @@ static void riscv_init_max_cpu_extensions(Object *obj) > { > RISCVCPU *cpu = RISCV_CPU(obj); > CPURISCVState *env = &cpu->env; > - RISCVCPUMultiExtConfig *prop; > + const RISCVCPUMultiExtConfig *prop; > > /* Enable RVG, RVJ and RVV that are disabled by default */ > set_misa(env, env->misa_mxl, env->misa_ext | RVG | RVJ | RVV);
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index c15bb572d4..50c2819d68 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1407,7 +1407,7 @@ typedef struct RISCVCPUMultiExtConfig { {.name = _name, .offset = CPU_CFG_OFFSET(_prop), \ .enabled = _defval} -static RISCVCPUMultiExtConfig riscv_cpu_extensions[] = { +static const RISCVCPUMultiExtConfig riscv_cpu_extensions[] = { /* Defaults for standard extensions */ MULTI_EXT_CFG_BOOL("sscofpmf", ext_sscofpmf, false), MULTI_EXT_CFG_BOOL("Zifencei", ext_ifencei, true), @@ -1469,7 +1469,7 @@ static RISCVCPUMultiExtConfig riscv_cpu_extensions[] = { DEFINE_PROP_END_OF_LIST(), }; -static RISCVCPUMultiExtConfig riscv_cpu_vendor_exts[] = { +static const RISCVCPUMultiExtConfig riscv_cpu_vendor_exts[] = { MULTI_EXT_CFG_BOOL("xtheadba", ext_xtheadba, false), MULTI_EXT_CFG_BOOL("xtheadbb", ext_xtheadbb, false), MULTI_EXT_CFG_BOOL("xtheadbs", ext_xtheadbs, false), @@ -1487,7 +1487,7 @@ static RISCVCPUMultiExtConfig riscv_cpu_vendor_exts[] = { }; /* These are experimental so mark with 'x-' */ -static RISCVCPUMultiExtConfig riscv_cpu_experimental_exts[] = { +static const RISCVCPUMultiExtConfig riscv_cpu_experimental_exts[] = { /* ePMP 0.9.3 */ MULTI_EXT_CFG_BOOL("x-epmp", epmp, false), MULTI_EXT_CFG_BOOL("x-smaia", ext_smaia, false), @@ -1558,7 +1558,7 @@ static void cpu_get_multi_ext_cfg(Object *obj, Visitor *v, const char *name, } static void cpu_add_multi_ext_prop(Object *cpu_obj, - RISCVCPUMultiExtConfig *multi_cfg) + const RISCVCPUMultiExtConfig *multi_cfg) { object_property_add(cpu_obj, multi_cfg->name, "bool", cpu_get_multi_ext_cfg, @@ -1594,11 +1594,13 @@ static void cpu_set_cfg_unavailable(Object *obj, Visitor *v, #endif static void riscv_cpu_add_multiext_prop_array(Object *obj, - RISCVCPUMultiExtConfig *array) + const RISCVCPUMultiExtConfig *array) { + const RISCVCPUMultiExtConfig *prop; + g_assert(array); - for (RISCVCPUMultiExtConfig *prop = array; prop && prop->name; prop++) { + for (prop = array; prop && prop->name; prop++) { cpu_add_multi_ext_prop(obj, prop); } } @@ -1622,11 +1624,13 @@ static void riscv_cpu_add_kvm_unavail_prop(Object *obj, const char *prop_name) } static void riscv_cpu_add_kvm_unavail_prop_array(Object *obj, - RISCVCPUMultiExtConfig *array) + const RISCVCPUMultiExtConfig *array) { + const RISCVCPUMultiExtConfig *prop; + g_assert(array); - for (RISCVCPUMultiExtConfig *prop = array; prop && prop->name; prop++) { + for (prop = array; prop && prop->name; prop++) { riscv_cpu_add_kvm_unavail_prop(obj, prop->name); } } @@ -1689,7 +1693,7 @@ static void riscv_init_max_cpu_extensions(Object *obj) { RISCVCPU *cpu = RISCV_CPU(obj); CPURISCVState *env = &cpu->env; - RISCVCPUMultiExtConfig *prop; + const RISCVCPUMultiExtConfig *prop; /* Enable RVG, RVJ and RVV that are disabled by default */ set_misa(env, env->misa_mxl, env->misa_ext | RVG | RVJ | RVV);