Message ID | 20230906091647.1667171-6-dbarboza@ventanamicro.com |
---|---|
State | New |
Headers | show |
Series | riscv: split TCG/KVM accelerators from cpu.c | expand |
On Wed, Sep 06, 2023 at 06:16:32AM -0300, Daniel Henrique Barboza wrote: > All generic CPUs call riscv_cpu_add_user_properties(). The 'max' CPU > calls riscv_init_max_cpu_extensions(). Both can be moved to a common > instance_post_init() callback, implemented in riscv_cpu_post_init(), > called by all CPUs. The call order then becomes: > > riscv_cpu_init() -> cpu_init() of each CPU -> .instance_post_init() > > In the near future riscv_cpu_post_init() will call the init() function > of the current accelerator, providing a hook for KVM and TCG accel > classes to change the init() process of the CPU. Yes, this seems to be what x86 does, so presumably it'll work for riscv too. > > Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> > --- > target/riscv/cpu.c | 42 ++++++++++++++++++++++++++++++++---------- > 1 file changed, 32 insertions(+), 10 deletions(-) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index 7569955c7e..4c6d595067 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -427,8 +427,6 @@ static void riscv_max_cpu_init(Object *obj) > mlx = MXL_RV32; > #endif > set_misa(env, mlx, 0); > - riscv_cpu_add_user_properties(obj); > - riscv_init_max_cpu_extensions(obj); > env->priv_ver = PRIV_VERSION_LATEST; > #ifndef CONFIG_USER_ONLY > set_satp_mode_max_supported(RISCV_CPU(obj), mlx == MXL_RV32 ? > @@ -442,7 +440,6 @@ static void rv64_base_cpu_init(Object *obj) > CPURISCVState *env = &RISCV_CPU(obj)->env; > /* We set this in the realise function */ > set_misa(env, MXL_RV64, 0); > - riscv_cpu_add_user_properties(obj); > /* Set latest version of privileged specification */ > env->priv_ver = PRIV_VERSION_LATEST; > #ifndef CONFIG_USER_ONLY > @@ -566,7 +563,6 @@ static void rv128_base_cpu_init(Object *obj) > CPURISCVState *env = &RISCV_CPU(obj)->env; > /* We set this in the realise function */ > set_misa(env, MXL_RV128, 0); > - riscv_cpu_add_user_properties(obj); > /* Set latest version of privileged specification */ > env->priv_ver = PRIV_VERSION_LATEST; > #ifndef CONFIG_USER_ONLY > @@ -579,7 +575,6 @@ static void rv32_base_cpu_init(Object *obj) > CPURISCVState *env = &RISCV_CPU(obj)->env; > /* We set this in the realise function */ > set_misa(env, MXL_RV32, 0); > - riscv_cpu_add_user_properties(obj); > /* Set latest version of privileged specification */ > env->priv_ver = PRIV_VERSION_LATEST; > #ifndef CONFIG_USER_ONLY > @@ -1215,6 +1210,37 @@ static void riscv_cpu_set_irq(void *opaque, int irq, int level) > } > #endif /* CONFIG_USER_ONLY */ > > +static bool riscv_cpu_is_dynamic(Object *cpu_obj) > +{ > + return object_dynamic_cast(cpu_obj, TYPE_RISCV_DYNAMIC_CPU) != NULL; > +} > + > +static bool riscv_cpu_has_max_extensions(Object *cpu_obj) > +{ > + return object_dynamic_cast(cpu_obj, TYPE_RISCV_CPU_MAX) != NULL; > +} > + > +static bool riscv_cpu_has_user_properties(Object *cpu_obj) > +{ > + if (kvm_enabled() && > + object_dynamic_cast(cpu_obj, TYPE_RISCV_CPU_HOST) != NULL) { > + return true; > + } > + > + return riscv_cpu_is_dynamic(cpu_obj); > +} > + > +static void riscv_cpu_post_init(Object *obj) > +{ > + if (riscv_cpu_has_user_properties(obj)) { > + riscv_cpu_add_user_properties(obj); > + } > + > + if (riscv_cpu_has_max_extensions(obj)) { > + riscv_init_max_cpu_extensions(obj); > + } > +} > + > static void riscv_cpu_init(Object *obj) > { > RISCVCPU *cpu = RISCV_CPU(obj); > @@ -1770,11 +1796,6 @@ static const struct SysemuCPUOps riscv_sysemu_ops = { > }; > #endif > > -static bool riscv_cpu_is_dynamic(Object *cpu_obj) > -{ > - return object_dynamic_cast(cpu_obj, TYPE_RISCV_DYNAMIC_CPU) != NULL; > -} > - > static void cpu_set_mvendorid(Object *obj, Visitor *v, const char *name, > void *opaque, Error **errp) > { > @@ -2011,6 +2032,7 @@ static const TypeInfo riscv_cpu_type_infos[] = { > .instance_size = sizeof(RISCVCPU), > .instance_align = __alignof__(RISCVCPU), > .instance_init = riscv_cpu_init, > + .instance_post_init = riscv_cpu_post_init, > .abstract = true, > .class_size = sizeof(RISCVCPUClass), > .class_init = riscv_cpu_class_init, > -- > 2.41.0 > Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
On 2023/9/6 17:16, Daniel Henrique Barboza wrote: > All generic CPUs call riscv_cpu_add_user_properties(). The 'max' CPU > calls riscv_init_max_cpu_extensions(). Both can be moved to a common > instance_post_init() callback, implemented in riscv_cpu_post_init(), > called by all CPUs. The call order then becomes: > > riscv_cpu_init() -> cpu_init() of each CPU -> .instance_post_init() > > In the near future riscv_cpu_post_init() will call the init() function > of the current accelerator, providing a hook for KVM and TCG accel > classes to change the init() process of the CPU. > > Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> > --- > target/riscv/cpu.c | 42 ++++++++++++++++++++++++++++++++---------- > 1 file changed, 32 insertions(+), 10 deletions(-) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index 7569955c7e..4c6d595067 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -427,8 +427,6 @@ static void riscv_max_cpu_init(Object *obj) > mlx = MXL_RV32; > #endif > set_misa(env, mlx, 0); > - riscv_cpu_add_user_properties(obj); > - riscv_init_max_cpu_extensions(obj); > env->priv_ver = PRIV_VERSION_LATEST; > #ifndef CONFIG_USER_ONLY > set_satp_mode_max_supported(RISCV_CPU(obj), mlx == MXL_RV32 ? > @@ -442,7 +440,6 @@ static void rv64_base_cpu_init(Object *obj) > CPURISCVState *env = &RISCV_CPU(obj)->env; > /* We set this in the realise function */ > set_misa(env, MXL_RV64, 0); > - riscv_cpu_add_user_properties(obj); > /* Set latest version of privileged specification */ > env->priv_ver = PRIV_VERSION_LATEST; > #ifndef CONFIG_USER_ONLY > @@ -566,7 +563,6 @@ static void rv128_base_cpu_init(Object *obj) > CPURISCVState *env = &RISCV_CPU(obj)->env; > /* We set this in the realise function */ > set_misa(env, MXL_RV128, 0); > - riscv_cpu_add_user_properties(obj); > /* Set latest version of privileged specification */ > env->priv_ver = PRIV_VERSION_LATEST; > #ifndef CONFIG_USER_ONLY > @@ -579,7 +575,6 @@ static void rv32_base_cpu_init(Object *obj) > CPURISCVState *env = &RISCV_CPU(obj)->env; > /* We set this in the realise function */ > set_misa(env, MXL_RV32, 0); > - riscv_cpu_add_user_properties(obj); > /* Set latest version of privileged specification */ > env->priv_ver = PRIV_VERSION_LATEST; > #ifndef CONFIG_USER_ONLY I think we should also remove riscv_cpu_add_user_properties from host cpu init. > @@ -1215,6 +1210,37 @@ static void riscv_cpu_set_irq(void *opaque, int irq, int level) > } > #endif /* CONFIG_USER_ONLY */ > > +static bool riscv_cpu_is_dynamic(Object *cpu_obj) > +{ > + return object_dynamic_cast(cpu_obj, TYPE_RISCV_DYNAMIC_CPU) != NULL; > +} > + > +static bool riscv_cpu_has_max_extensions(Object *cpu_obj) > +{ > + return object_dynamic_cast(cpu_obj, TYPE_RISCV_CPU_MAX) != NULL; > +} > + > +static bool riscv_cpu_has_user_properties(Object *cpu_obj) > +{ > + if (kvm_enabled() && > + object_dynamic_cast(cpu_obj, TYPE_RISCV_CPU_HOST) != NULL) { > + return true; > + } > + > + return riscv_cpu_is_dynamic(cpu_obj); > +} > + > +static void riscv_cpu_post_init(Object *obj) > +{ > + if (riscv_cpu_has_user_properties(obj)) { > + riscv_cpu_add_user_properties(obj); Otherwise, we will enter here for host cpu. Thanks, Zhiwei > + } > + > + if (riscv_cpu_has_max_extensions(obj)) { > + riscv_init_max_cpu_extensions(obj); > + } > +} > + > static void riscv_cpu_init(Object *obj) > { > RISCVCPU *cpu = RISCV_CPU(obj); > @@ -1770,11 +1796,6 @@ static const struct SysemuCPUOps riscv_sysemu_ops = { > }; > #endif > > -static bool riscv_cpu_is_dynamic(Object *cpu_obj) > -{ > - return object_dynamic_cast(cpu_obj, TYPE_RISCV_DYNAMIC_CPU) != NULL; > -} > - > static void cpu_set_mvendorid(Object *obj, Visitor *v, const char *name, > void *opaque, Error **errp) > { > @@ -2011,6 +2032,7 @@ static const TypeInfo riscv_cpu_type_infos[] = { > .instance_size = sizeof(RISCVCPU), > .instance_align = __alignof__(RISCVCPU), > .instance_init = riscv_cpu_init, > + .instance_post_init = riscv_cpu_post_init, > .abstract = true, > .class_size = sizeof(RISCVCPUClass), > .class_init = riscv_cpu_class_init,
On 9/19/23 06:16, LIU Zhiwei wrote: > > On 2023/9/6 17:16, Daniel Henrique Barboza wrote: >> All generic CPUs call riscv_cpu_add_user_properties(). The 'max' CPU >> calls riscv_init_max_cpu_extensions(). Both can be moved to a common >> instance_post_init() callback, implemented in riscv_cpu_post_init(), >> called by all CPUs. The call order then becomes: >> >> riscv_cpu_init() -> cpu_init() of each CPU -> .instance_post_init() >> >> In the near future riscv_cpu_post_init() will call the init() function >> of the current accelerator, providing a hook for KVM and TCG accel >> classes to change the init() process of the CPU. >> >> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> >> --- >> target/riscv/cpu.c | 42 ++++++++++++++++++++++++++++++++---------- >> 1 file changed, 32 insertions(+), 10 deletions(-) >> >> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c >> index 7569955c7e..4c6d595067 100644 >> --- a/target/riscv/cpu.c >> +++ b/target/riscv/cpu.c >> @@ -427,8 +427,6 @@ static void riscv_max_cpu_init(Object *obj) >> mlx = MXL_RV32; >> #endif >> set_misa(env, mlx, 0); >> - riscv_cpu_add_user_properties(obj); >> - riscv_init_max_cpu_extensions(obj); >> env->priv_ver = PRIV_VERSION_LATEST; >> #ifndef CONFIG_USER_ONLY >> set_satp_mode_max_supported(RISCV_CPU(obj), mlx == MXL_RV32 ? >> @@ -442,7 +440,6 @@ static void rv64_base_cpu_init(Object *obj) >> CPURISCVState *env = &RISCV_CPU(obj)->env; >> /* We set this in the realise function */ >> set_misa(env, MXL_RV64, 0); >> - riscv_cpu_add_user_properties(obj); >> /* Set latest version of privileged specification */ >> env->priv_ver = PRIV_VERSION_LATEST; >> #ifndef CONFIG_USER_ONLY >> @@ -566,7 +563,6 @@ static void rv128_base_cpu_init(Object *obj) >> CPURISCVState *env = &RISCV_CPU(obj)->env; >> /* We set this in the realise function */ >> set_misa(env, MXL_RV128, 0); >> - riscv_cpu_add_user_properties(obj); >> /* Set latest version of privileged specification */ >> env->priv_ver = PRIV_VERSION_LATEST; >> #ifndef CONFIG_USER_ONLY >> @@ -579,7 +575,6 @@ static void rv32_base_cpu_init(Object *obj) >> CPURISCVState *env = &RISCV_CPU(obj)->env; >> /* We set this in the realise function */ >> set_misa(env, MXL_RV32, 0); >> - riscv_cpu_add_user_properties(obj); >> /* Set latest version of privileged specification */ >> env->priv_ver = PRIV_VERSION_LATEST; >> #ifndef CONFIG_USER_ONLY > I think we should also remove riscv_cpu_add_user_properties from host cpu init. Line removed in v3. Thanks, Daniel >> @@ -1215,6 +1210,37 @@ static void riscv_cpu_set_irq(void *opaque, int irq, int level) >> } >> #endif /* CONFIG_USER_ONLY */ >> +static bool riscv_cpu_is_dynamic(Object *cpu_obj) >> +{ >> + return object_dynamic_cast(cpu_obj, TYPE_RISCV_DYNAMIC_CPU) != NULL; >> +} >> + >> +static bool riscv_cpu_has_max_extensions(Object *cpu_obj) >> +{ >> + return object_dynamic_cast(cpu_obj, TYPE_RISCV_CPU_MAX) != NULL; >> +} >> + >> +static bool riscv_cpu_has_user_properties(Object *cpu_obj) >> +{ >> + if (kvm_enabled() && >> + object_dynamic_cast(cpu_obj, TYPE_RISCV_CPU_HOST) != NULL) { >> + return true; >> + } >> + >> + return riscv_cpu_is_dynamic(cpu_obj); >> +} >> + >> +static void riscv_cpu_post_init(Object *obj) >> +{ >> + if (riscv_cpu_has_user_properties(obj)) { >> + riscv_cpu_add_user_properties(obj); > > Otherwise, we will enter here for host cpu. > > Thanks, > Zhiwei > >> + } >> + >> + if (riscv_cpu_has_max_extensions(obj)) { >> + riscv_init_max_cpu_extensions(obj); >> + } >> +} >> + >> static void riscv_cpu_init(Object *obj) >> { >> RISCVCPU *cpu = RISCV_CPU(obj); >> @@ -1770,11 +1796,6 @@ static const struct SysemuCPUOps riscv_sysemu_ops = { >> }; >> #endif >> -static bool riscv_cpu_is_dynamic(Object *cpu_obj) >> -{ >> - return object_dynamic_cast(cpu_obj, TYPE_RISCV_DYNAMIC_CPU) != NULL; >> -} >> - >> static void cpu_set_mvendorid(Object *obj, Visitor *v, const char *name, >> void *opaque, Error **errp) >> { >> @@ -2011,6 +2032,7 @@ static const TypeInfo riscv_cpu_type_infos[] = { >> .instance_size = sizeof(RISCVCPU), >> .instance_align = __alignof__(RISCVCPU), >> .instance_init = riscv_cpu_init, >> + .instance_post_init = riscv_cpu_post_init, >> .abstract = true, >> .class_size = sizeof(RISCVCPUClass), >> .class_init = riscv_cpu_class_init,
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 7569955c7e..4c6d595067 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -427,8 +427,6 @@ static void riscv_max_cpu_init(Object *obj) mlx = MXL_RV32; #endif set_misa(env, mlx, 0); - riscv_cpu_add_user_properties(obj); - riscv_init_max_cpu_extensions(obj); env->priv_ver = PRIV_VERSION_LATEST; #ifndef CONFIG_USER_ONLY set_satp_mode_max_supported(RISCV_CPU(obj), mlx == MXL_RV32 ? @@ -442,7 +440,6 @@ static void rv64_base_cpu_init(Object *obj) CPURISCVState *env = &RISCV_CPU(obj)->env; /* We set this in the realise function */ set_misa(env, MXL_RV64, 0); - riscv_cpu_add_user_properties(obj); /* Set latest version of privileged specification */ env->priv_ver = PRIV_VERSION_LATEST; #ifndef CONFIG_USER_ONLY @@ -566,7 +563,6 @@ static void rv128_base_cpu_init(Object *obj) CPURISCVState *env = &RISCV_CPU(obj)->env; /* We set this in the realise function */ set_misa(env, MXL_RV128, 0); - riscv_cpu_add_user_properties(obj); /* Set latest version of privileged specification */ env->priv_ver = PRIV_VERSION_LATEST; #ifndef CONFIG_USER_ONLY @@ -579,7 +575,6 @@ static void rv32_base_cpu_init(Object *obj) CPURISCVState *env = &RISCV_CPU(obj)->env; /* We set this in the realise function */ set_misa(env, MXL_RV32, 0); - riscv_cpu_add_user_properties(obj); /* Set latest version of privileged specification */ env->priv_ver = PRIV_VERSION_LATEST; #ifndef CONFIG_USER_ONLY @@ -1215,6 +1210,37 @@ static void riscv_cpu_set_irq(void *opaque, int irq, int level) } #endif /* CONFIG_USER_ONLY */ +static bool riscv_cpu_is_dynamic(Object *cpu_obj) +{ + return object_dynamic_cast(cpu_obj, TYPE_RISCV_DYNAMIC_CPU) != NULL; +} + +static bool riscv_cpu_has_max_extensions(Object *cpu_obj) +{ + return object_dynamic_cast(cpu_obj, TYPE_RISCV_CPU_MAX) != NULL; +} + +static bool riscv_cpu_has_user_properties(Object *cpu_obj) +{ + if (kvm_enabled() && + object_dynamic_cast(cpu_obj, TYPE_RISCV_CPU_HOST) != NULL) { + return true; + } + + return riscv_cpu_is_dynamic(cpu_obj); +} + +static void riscv_cpu_post_init(Object *obj) +{ + if (riscv_cpu_has_user_properties(obj)) { + riscv_cpu_add_user_properties(obj); + } + + if (riscv_cpu_has_max_extensions(obj)) { + riscv_init_max_cpu_extensions(obj); + } +} + static void riscv_cpu_init(Object *obj) { RISCVCPU *cpu = RISCV_CPU(obj); @@ -1770,11 +1796,6 @@ static const struct SysemuCPUOps riscv_sysemu_ops = { }; #endif -static bool riscv_cpu_is_dynamic(Object *cpu_obj) -{ - return object_dynamic_cast(cpu_obj, TYPE_RISCV_DYNAMIC_CPU) != NULL; -} - static void cpu_set_mvendorid(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { @@ -2011,6 +2032,7 @@ static const TypeInfo riscv_cpu_type_infos[] = { .instance_size = sizeof(RISCVCPU), .instance_align = __alignof__(RISCVCPU), .instance_init = riscv_cpu_init, + .instance_post_init = riscv_cpu_post_init, .abstract = true, .class_size = sizeof(RISCVCPUClass), .class_init = riscv_cpu_class_init,
All generic CPUs call riscv_cpu_add_user_properties(). The 'max' CPU calls riscv_init_max_cpu_extensions(). Both can be moved to a common instance_post_init() callback, implemented in riscv_cpu_post_init(), called by all CPUs. The call order then becomes: riscv_cpu_init() -> cpu_init() of each CPU -> .instance_post_init() In the near future riscv_cpu_post_init() will call the init() function of the current accelerator, providing a hook for KVM and TCG accel classes to change the init() process of the CPU. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> --- target/riscv/cpu.c | 42 ++++++++++++++++++++++++++++++++---------- 1 file changed, 32 insertions(+), 10 deletions(-)