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Mon, 04 Sep 2023 09:13:12 -0700 (PDT) Received: from m1x-phil.lan ([176.187.209.227]) by smtp.gmail.com with ESMTPSA id e19-20020a1709067e1300b009a198078c53sm6305559ejr.214.2023.09.04.09.13.11 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 04 Sep 2023 09:13:11 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: Markus Armbruster , qemu-devel@nongnu.org Cc: qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-D?= =?utf-8?q?aud=C3=A9?= , Bastian Koppelmann Subject: [PATCH v2 06/22] target/tricore: Clean up local variable shadowing Date: Mon, 4 Sep 2023 18:12:18 +0200 Message-ID: <20230904161235.84651-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230904161235.84651-1-philmd@linaro.org> References: <20230904161235.84651-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62f; envelope-from=philmd@linaro.org; helo=mail-ej1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Fix: target/tricore/translate.c:5016:18: warning: declaration of ‘temp’ shadows a previous local [-Wshadow=compatible-local] 5016 | TCGv temp = tcg_constant_i32(const9); | ^~~~ target/tricore/translate.c:4958:10: note: shadowed declaration is here 4958 | TCGv temp; | ^~~~ Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bastian Koppelmann --- target/tricore/translate.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/tricore/translate.c b/target/tricore/translate.c index 6ae5ccbf72..9ca211b2a8 100644 --- a/target/tricore/translate.c +++ b/target/tricore/translate.c @@ -4962,8 +4962,6 @@ static void decode_rc_logical_shift(DisasContext *ctx) const9 = MASK_OP_RC_CONST9(ctx->opcode); op2 = MASK_OP_RC_OP2(ctx->opcode); - temp = tcg_temp_new(); - switch (op2) { case OPC2_32_RC_AND: tcg_gen_andi_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], const9); @@ -4972,10 +4970,12 @@ static void decode_rc_logical_shift(DisasContext *ctx) tcg_gen_andi_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], ~const9); break; case OPC2_32_RC_NAND: + temp = tcg_temp_new(); tcg_gen_movi_tl(temp, const9); tcg_gen_nand_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], temp); break; case OPC2_32_RC_NOR: + temp = tcg_temp_new(); tcg_gen_movi_tl(temp, const9); tcg_gen_nor_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], temp); break; @@ -5013,7 +5013,7 @@ static void decode_rc_logical_shift(DisasContext *ctx) break; case OPC2_32_RC_SHUFFLE: if (has_feature(ctx, TRICORE_FEATURE_162)) { - TCGv temp = tcg_constant_i32(const9); + temp = tcg_constant_i32(const9); gen_helper_shuffle(cpu_gpr_d[r2], cpu_gpr_d[r1], temp); } else { generate_trap(ctx, TRAPC_INSN_ERR, TIN2_IOPC);