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Thu, 31 Aug 2023 15:56:46 -0700 (PDT) Received: from m1x-phil.lan ([176.187.199.245]) by smtp.gmail.com with ESMTPSA id rn1-20020a170906d92100b00992665694f7sm1239358ejb.107.2023.08.31.15.56.44 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 31 Aug 2023 15:56:45 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Cc: qemu-arm@nongnu.org, qemu-block@nongnu.org, David Gibson , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Beniamino Galvani , Peter Maydell , Strahinja Jankovic Subject: [PATCH 06/11] hw/arm/allwinner: Clean up local variable shadowing Date: Fri, 1 Sep 2023 00:56:01 +0200 Message-ID: <20230831225607.30829-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230831225607.30829-1-philmd@linaro.org> References: <20230831225607.30829-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Fix: hw/arm/allwinner-r40.c:412:14: error: declaration shadows a local variable [-Werror,-Wshadow] for (int i = 0; i < AW_R40_NUM_MMCS; i++) { ^ hw/arm/allwinner-r40.c:299:14: note: previous declaration is here unsigned i; ^ Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell --- hw/arm/allwinner-r40.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/hw/arm/allwinner-r40.c b/hw/arm/allwinner-r40.c index 7d29eb224f..a0d367c60d 100644 --- a/hw/arm/allwinner-r40.c +++ b/hw/arm/allwinner-r40.c @@ -296,10 +296,9 @@ static void allwinner_r40_realize(DeviceState *dev, Error **errp) { const char *r40_nic_models[] = { "gmac", "emac", NULL }; AwR40State *s = AW_R40(dev); - unsigned i; /* CPUs */ - for (i = 0; i < AW_R40_NUM_CPUS; i++) { + for (unsigned i = 0; i < AW_R40_NUM_CPUS; i++) { /* * Disable secondary CPUs. Guest EL3 firmware will start @@ -335,7 +334,7 @@ static void allwinner_r40_realize(DeviceState *dev, Error **errp) * maintenance interrupt signal to the appropriate GIC PPI inputs, * and the GIC's IRQ/FIQ/VIRQ/VFIQ interrupt outputs to the CPU's inputs. */ - for (i = 0; i < AW_R40_NUM_CPUS; i++) { + for (unsigned i = 0; i < AW_R40_NUM_CPUS; i++) { DeviceState *cpudev = DEVICE(&s->cpus[i]); int ppibase = AW_R40_GIC_NUM_SPI + i * GIC_INTERNAL + GIC_NR_SGIS; int irq; @@ -494,7 +493,7 @@ static void allwinner_r40_realize(DeviceState *dev, Error **errp) qdev_get_gpio_in(DEVICE(&s->gic), AW_R40_GIC_SPI_EMAC)); /* Unimplemented devices */ - for (i = 0; i < ARRAY_SIZE(r40_unimplemented); i++) { + for (unsigned i = 0; i < ARRAY_SIZE(r40_unimplemented); i++) { create_unimplemented_device(r40_unimplemented[i].device_name, r40_unimplemented[i].base, r40_unimplemented[i].size);