From patchwork Tue Aug 29 04:24:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Wen, Qian" X-Patchwork-Id: 1827078 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=l3UDxT0I; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4RZYwM0TK1z1yfy for ; Tue, 29 Aug 2023 14:14:27 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qaq6d-0007Xy-L9; Tue, 29 Aug 2023 00:13:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qaq6b-0007Xd-E2 for qemu-devel@nongnu.org; Tue, 29 Aug 2023 00:13:29 -0400 Received: from mgamail.intel.com ([134.134.136.31]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qaq6V-0005vu-0f for qemu-devel@nongnu.org; Tue, 29 Aug 2023 00:13:29 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1693282402; x=1724818402; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=q4/mCZYrIqKP2Rle4FHQfcUbdw3Q+l03oL7jOOLmsxM=; b=l3UDxT0Im4vI0yuBVtMEgRt4/3/OzQmlNnFF0+qn1w8JI/IfN5qkSVls ckRPN7vSRXWDSYYqRYzryos5Eplh7xs1plAZQtFDBdB47dqYNZQwnFVoD cI0ZUyMumkdhFbp/mCOQ+kmasDqGINgV97XALU/19tB9G1kXENdTLuuN8 LrekISTQemRHbF248/IKEzQqaf0Q73wqXRQWvld9L0S6dQ+wS0NjPPiOq lvp5dvCCdumTIBDvJTtjlbalYEGtKVerlUaz2OFOWbmNjw3uLeAHJKipS ACB1+9eNh6NJBjyqjKj7MA49JMzFUbRe8w+yOx9ZV/2fH7j20q2AJ+o8a g==; X-IronPort-AV: E=McAfee;i="6600,9927,10816"; a="439220465" X-IronPort-AV: E=Sophos;i="6.02,208,1688454000"; d="scan'208";a="439220465" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Aug 2023 21:13:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10816"; a="862087930" X-IronPort-AV: E=Sophos;i="6.02,208,1688454000"; d="scan'208";a="862087930" Received: from pc.sh.intel.com ([10.238.200.75]) by orsmga004.jf.intel.com with ESMTP; 28 Aug 2023 21:13:18 -0700 From: Qian Wen To: qemu-devel@nongnu.org Cc: xiaoyao.li@intel.com, zhao1.liu@intel.com, pbonzini@redhat.com, richard.henderson@linaro.org, babu.moger@amd.com, Qian Wen , Isaku Yamahata Subject: [PATCH v4 1/2] target/i386: Avoid cpu number overflow in legacy topology Date: Tue, 29 Aug 2023 12:24:04 +0800 Message-Id: <20230829042405.932523-2-qian.wen@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230829042405.932523-1-qian.wen@intel.com> References: <20230829042405.932523-1-qian.wen@intel.com> MIME-Version: 1.0 Received-SPF: pass client-ip=134.134.136.31; envelope-from=qian.wen@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The legacy topology enumerated by CPUID.1.EBX[23:16] is defined in SDM Vol2: Bits 23-16: Maximum number of addressable IDs for logical processors in this physical package. When threads_per_socket > 255, it will 1) overwrite bits[31:24] which is apic_id, 2) bits [23:16] get truncated. Specifically, if launching the VM with -smp 256, the value written to EBX[23:16] is 0 because of data overflow. If the guest only supports legacy topology, without V2 Extended Topology enumerated by CPUID.0x1f or Extended Topology enumerated by CPUID.0x0b to support over 255 CPUs, the return of the kernel invoking cpu_smt_allowed() is false and APs (application processors) will fail to bring up. Then only CPU 0 is online, and others are offline. For example, launch VM via: qemu-system-x86_64 -M q35,accel=kvm,kernel-irqchip=split \ -cpu qemu64,cpuid-0xb=off -smp 256 -m 32G \ -drive file=guest.img,if=none,id=virtio-disk0,format=raw \ -device virtio-blk-pci,drive=virtio-disk0,bootindex=1 --nographic The guest shows: CPU(s): 256 On-line CPU(s) list: 0 Off-line CPU(s) list: 1-255 To avoid this issue caused by overflow, limit the max value written to EBX[23:16] to 255 as the HW does. Signed-off-by: Qian Wen Reviewed-by: Zhao Liu Reviewed-by: Xiaoyao Li Reviewed-by: Isaku Yamahata --- target/i386/cpu.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 00f913b638..fc0437bdb1 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6012,6 +6012,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, uint32_t die_offset; uint32_t limit; uint32_t signature[3]; + uint32_t threads_per_socket; X86CPUTopoInfo topo_info; topo_info.dies_per_pkg = env->nr_dies; @@ -6053,8 +6054,9 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, *ecx |= CPUID_EXT_OSXSAVE; } *edx = env->features[FEAT_1_EDX]; - if (cs->nr_cores * cs->nr_threads > 1) { - *ebx |= (cs->nr_cores * cs->nr_threads) << 16; + threads_per_socket = cs->nr_cores * cs->nr_threads; + if (threads_per_socket > 1) { + *ebx |= MIN(threads_per_socket, 255) << 16; *edx |= CPUID_HT; } if (!cpu->enable_pmu) {